A Scalable Correlator Architecture Based on Modular FPGA Hardware, Reuseable Gateware, and Data Packetization (Q56485814)

From Wikidata
Jump to navigation Jump to search
No description defined
edit
Language Label Description Also known as
English
A Scalable Correlator Architecture Based on Modular FPGA Hardware, Reuseable Gateware, and Data Packetization
No description defined

    Statements

    A Scalable Correlator Architecture Based on Modular FPGA Hardware, Reuseable Gateware, and Data Packetization (English)
    0 references
    0 references
    0 references
    Aaron Parsons
    0 references
    Donald Backer
    0 references
    Henry Chen
    0 references
    Dan Werthimer
    0 references
    Pierre Droz
    0 references
    Terry Filiba
    0 references
    Jason Manley
    0 references
    Peter McMahon
    0 references
    Arash Parsa
    0 references
    David MacMahon
    0 references
    Melvyn Wright
    0 references
    November 2008
    0 references
    120
    1 reference
    873
    0 references
    1207–1221
    1 reference

    Identifiers

     
    edit
      edit
        edit
          edit
            edit
              edit
                edit
                  edit
                    edit