4th Gen Intel Xeon Scalable XCC, MCC, and HBM Variants Are A Secret Competitive Edge
With the 4th Generation Intel Xeon Scalable processors, we saw a ton of innovation. One of the overlooked areas of innovation is in the processor line's three main configurations. Many of the headlines at STH and around the web are on top core count parts. On the other hand, much of the volume comes in the form of lower core count and lower-cost chips. That volume segment is where Intel has an advantage because of its "MCC" design. Let us take a quick look at the 4th Gen Intel Xeon Scalable (codenamed "Sapphire Rapids") XCC, MCC, and HBM configurations.
Note: Intel sponsored us to take STH coverage of the new platforms and summarize it in this LinkedIn post. While Intel's agency paid for this summarization, neither Intel nor its agency reviewed the content before posting. As a result, we are marking this as an #ad but wanted to be compliant and transparent as to what is going on.
4th Gen Intel Xeon Scalable XCC, MCC, and HBM Variants Are A Secret Competitive Edge
Perhaps the most discussed variant of the new parts is the XCC variant. This uses advanced packaging to tie together four compute tiles into one logical CPU. Each tile has up to 15 active cores that allow Intel to build up to 60 core CPUs in this generation.
There is a variant of the XCC parts called the HBM line that makes up Xeon Max. Here, each of the four tiles gets its own 16GB HBM2e memory stack for 64GB of high-speed HBM2e memory on the CPU package. This allows for a higher-speed memory pool that can be used as a separate pool, a transparent caching tier, or even as a system's primary and only memory.
Where Intel has a major advantage over AMD at the moment is with its MCC die. Instead of using newer packaging for higher core counts, MCC is almost like an update to the previous generations of Xeons as a monolithic die. This monolithic die has half to a quarter of the onboard acceleration capability, but the TDP range is 125W to 350W with up to 32 active cores.
That range is important. The lowest TDP AMD EPYC 9004 "Genoa" part, the EPYC 9124 starts at 200W. Or in other words, AMD's lowest power Genoa has a 60% higher TDP than the Intel Xeon Bronze 3408U at 125W. Intel also has several SKUs with higher core counts between 125W and 200W. Many servers use lower-power and lower-cost chips to power the PCIe I/O in a system. The MCC line allows Intel to cater to a range of servers that do not need high core counts and associated power consumption.
Final Words
On the STH main site, we have a detailed piece on the intricacies of the new line, and the breakdown of XCC, MCC, and HBM parts in 4th Gen Intel Xeon Scalable Sapphire Rapids Leaps Forward. If you want to learn more, you can head there. We are going to have several 4th Gen Intel Xeon Scalable server reviews coming in the next few weeks on STH, so stay tuned.
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