Electric Motor & Contracting Co., Inc’s Post

This year is the 15th Anniversary of EPICS in IEEE! Join us as we celebrate the Past, Present, and Future of EPICS in IEEE! The EPICS in IEEE committee is thrilled to commemorate this milestone. Read more about EPICS in IEEE's mission and what to expect this year: https://bit.ly/3UqtNEU

Read one of the latest papers published in the IEEE Transactions on Circuits and Systems I: Regular Papers (Volume 70, Issue 9, September 2023) titled "Memristor-Assisted Background Calibration for SAR ADCs: A Feasibility Study." This paper proposes a memristor-assisted sign-based background calibration scheme for analog-to-digital converters (ADCs). Learn more and access the full paper by visiting IEEE Xplore, here: https://loom.ly/blvqhQY #IEEE #TCASI #CircuitsandSystems

Delve into the paper titled "Editorial on the Special Section on the 2021 IEEE International Symposium on Integrated Circuits and Systems" published in the IEEE Open Journal of Circuits and Systems (OJCAS). 📝 Volume 2, 2021 Learn more by visiting IEEE Xplore: https://loom.ly/r0OnQZk #IEEEOpenJournal #ResearchPaper #Technews #OJCAS #IEEEOpenJournalonCircuitsandSystems

First Day at IEEE T&D Conference ✅ Here we are featuring PFIFFNER Group RC divider for power quality measurement and reporting. Your CT doesn’t do this with the accuracy of an RC Divider, it cant. See you tomorrow!

📢 Read our Review paper 📚 Analysis of EMC Factors on Electronic Devices Using PLS-SEM Method: A Case Study in Vietnam 🔗 https://lnkd.in/ggMijz-a 👨🔬 by Mr. Minh Ly Duc et al. 🏫 Van Lang University VSB - Technical University of Ostrava #electromagneticcompatibility

This work was presented at IECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society, Portugal. Phase Locked Loop with DC-Offset Removal for Grid Synchronization Abstract: This paper proposes an efficient and simple solution for grid synchronization adopting a phase angle correction in the conventional synchronous reference frame (SRF) phase locked loop (PLL) with its small single model and stability analysis. The proposed method is computationally simple and capable of DC-offset rejection and perfectly synchronizing with the grid. The proposed method is compared with another powerful PLL method showing promising results. DOI: https://lnkd.in/dAq-f8em

I've recently shared a poster (tinyurl.com/d-Ch7XtX) about optimum current references for fault-tolerant PMSMs [1] (paper ref. at the bottom) that I will present at IEEE ECCE 2023. Now, I'd like to share a video of me presenting the entire poster, in case it is helpful to you (is it?). A large screen is recommended. LinkedIn doesn't allow me to upload the complete video, so you may view the last minutes (or the entire thing) on YouTube: lnkd.in/dJNnBdjD 🎞. In any case, I'm looking forward to meeting you at the conference for further discussion, at the poster session 3: Tuesday, Oct. 31, 14:30-16:10 (lnkd.in/dESUcBdE). Thank you all. 📰 [1] "General Open-Phase Fault-Tolerant Online Current-Reference Generation for Maximum Torque Range and Minimum Copper Loss With Phase-Current-Peak Limitation for n-Phase PMSMs With Nonsinusoidal Back-EMF", IEEE ECCE, Oct./Nov. 2023. 📃Paper pdf: lnkd.in/d4w2AGCS 🗞Poster: tinyurl.com/d-Ch7XtX ⬇Simulink: lnkd.in/dEvqsmqD 📰Linkedin posts with more videos: tinyurl.com/dMZSxggr #powerelectronics #electricalengineering #variablespeeddrives

We generally neglect the body effect when we solve MOS Amplifiers problems. But what if you are given the value of body effect transconductance? How to solve these problems? Video Link is in the comment section. (P.S. - This problem was asked in GATE'21 BM Question Paper)

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