PCI-SIG members can contribute to PCIe technology development by submitting engineering change requests (ECRs). Members can also review and comment on draft specifications, ECRs and engineering change notices (ECNs). Learn more about the ECR/ECN process and check the Review Zone for new postings on the PCI-SIG website > https://bit.ly/4cyafVi #PCISIG #PCIe #ECR #ECN
About us
PCI-SIG is the consortium that owns and manages PCI specifications as open industry standards. The organization defines industry standard I/O specifications consistent with the needs of its members. Currently, PCI-SIG is comprised of nearly 700 industry-leading member companies. To join PCI-SIG, and for a list of the Board of Directors, visit www.pcisig.com.
- Website
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http://pcisig.com
External link for PCI-SIG
- Industry
- Computer Hardware Manufacturing
- Company size
- 2-10 employees
- Headquarters
- BEAVERTON, Oregon
- Type
- Nonprofit
Locations
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Primary
3855 SW 153RD DR
BEAVERTON, Oregon 97003, US
Employees at PCI-SIG
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Steve Glaser
Principal Engineer at NVIDIA / Board Member at PCI-SIG
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Dong Wei, MBA
Lead Standards Architect and Fellow at Arm
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Rob Gough
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Debendra Das Sharma
Intel Senior Fellow at Intel Corporation, Chair Universal Chiplet Interconnect Express (UCIe) Consortium, PCI-SIG Board Member, and Co-chair CXL…
Updates
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The PCI-SIG CopprLink specification was announced in April 2024, providing a solution for next-generation, latency-sensitive applications. Watch our latest video featuring Mohiuddin Mazumder (Intel Corporation), Co-Chair of the PCI-SIG Electrical and Optical Work Groups as he explains the benefits of CopprLink cabling > https://bit.ly/4cRDcvH #PCISIG #PCIe #CopprLink #datacenter #AI #cloud #HPC
PCIe® CopprLink™ Internal and External Cables
https://www.youtube.com/
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Don’t miss the PCI-SIG session at FMS: the Future of Memory and Storage “The PCIe Specification: A High Bandwidth Interconnect Solution for AI and ML” presented by PCI-SIG Vice President Richard Solomon of Synopsys Inc on Thursday, Aug. 8 at 8:30 am PT. This session will preview how PCIe technology’s continued doubling of the data rates allows AI chipset vendors and AI accelerator developers to maintain a clear path for growth today and into the future. View the full event agenda on the FMS website > https://bit.ly/3S3xJt8 #PCISIG #PCIe #AI #ML #IDE #ASIC #FMS2024
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The agenda is now available for the upcoming PCI-SIG DevCon in Seoul, South Korea on Sept. 26, 2024. Learn from some of the leading experts in PCIe technology on a variety of topics ranging from PHY Logical, CEM Updates, and more. View the full agenda on the PCI-SIG website and register for the event > https://bit.ly/4bBYyvG #PCISIGDevCon24 #PCISIG #PCIe
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PCI-SIG Compliance Workshop #130 will be held on Jul 29-Aug. 2 at the Embassy Suites San Francisco in South San Francisco, California. Learn more about the upcoming workshop and keep an eye out for future events on the PCI-SIG website > https://bit.ly/3VnD9kZ #PCISIGComplianceWorkshop #PCISIG #PCIe
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The recording for last week’s PCI-SIG webinar, “The Journey to CopprLink and Beyond: An Exploration of PCIe Cabling Solutions” is now available on the PCI-SIG YouTube page. Presenters Mohiuddin Mazumder (Intel Corporation), Electrical Work Group Co-Chair, and Sam K. (Amphenol), Cabling Work Group Chair, provided an overview of current PCI-SIG cabling efforts and the future of PCIe cabling as PCI-SIG explores and optical interconnect and PCIe 7.0 technology at 128 GT/s. Watch the full webinar recording > https://bit.ly/465aipq #PCISIG #PCIe #optical #CopprLink #datacenter #AI #cloud #HPC
The Journey to CopprLink™ and Beyond: An Exploration of PCIe® Cabling Solutions
https://www.youtube.com/
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PCI-SIG Members can get answers to technical questions by utilizing the PCI-SIG Technical Forum. The PCI-SIG Technical Forum is moderated by PCI-SIG Work Group Chairs and PCIe experts and provides a platform for members to receive technical support. The forum maintains a visible and permanent record of technical questions and answers. Access the PCI-SIG Technical Forum > https://bit.ly/4aAGt1A #PCISIG #PCIe
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Don’t miss the upcoming PCI-SIG session at FMS: the Future of Memory and Storage, “The PCIe Specification: A High Bandwidth Interconnect Solution for AI and ML,” presented by PCI-SIG Vice President Richard Solomon of Synopsys Inc on Thursday, Aug. 8 at 8:30 am PT. This session will explore key PCIe technology benefits for AI/ML applications including its low-power modes like L0p and security features like Integrity and Data Encryption (IDE). View the full event agenda on the FMS website > https://bit.ly/3S3xJt8 #PCISIG #PCIe #AI #ML #IDE #ASIC #FMS2024
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Registration is now open for the upcoming PCI-SIG Developers Conference India, which will be held in Bengaluru, India from Nov. 11-12, 2024. If you are interested in speaking as a part of the Members Implementation Experiences track, all abstracts and materials must be submitted by Friday, Aug. 9, 2024. Learn more about the upcoming India DevCon speaking opportunities and register for the event on the PCI-SIG website > https://bit.ly/3XTeA0X #PCISIGDevCon24 #PCISIG #PCIe
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A recent article from Abdullah Faisal in Appuals provides an overview of the PCIe 4.0 specification, including the advantages of PCIe technology’s high bandwidth, scalability, future proofing and more. Read the article to learn how the PCIe 4.0 specification powers fast connections between different components > https://bit.ly/3VXI2QL #PCISIG #PCIe #GPU #CPU