PMU Analog Mixed-Signal Design Verification Intern (m/f/d)
Nabern, Baden-Wurttemberg, Germany
Hardware
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, amazing people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver the next groundbreaking Apple product!
The Silicon Engineering Group is responsible for developing cutting edge chips that can be found in all of your favourite Apple products. Our power management design team in Nabern (close to Stuttgart) has a unique opportunity for a motivated, collaborative, and solution-oriented intern to actively contribute to our chip development.
Description
As an Intern in the PMU Team, you will closely collaborate and engage with members of multi-functional areas including design, verification, and validation teams to learn the fundamentals of building a Power Management IC.
This will involve:
- Designing/optimising sub-circuits and verifying compliancy to specification
- Defining chip-level verification plans to ensure coverage of specified features
- Execution of verification plans, analyzing the results and debugging the design
- Writing behavioural/functional models for sub-blocks and validating the models against the design
Minimum Qualifications
- Enrolled in Bachelors/Masters/PhD program in EE or related field
- Eagerness to learn new things and take up new challenges
- Fluent English language skills are required
- Availability for 6 months or more
Key Qualifications
Preferred Qualifications
- Knowledge of microelectronics and IC design
- Understanding of analog circuitry and digital design
- Familiarity with behavioural modelling is beneficial
- Familiarity with Verilog, Verilog-AMS, SystemVerilog is a plus
- Knowledge of a scripting language is desirable (Python, TCL, Bash or Perl)
- Strong problem solving and interpersonal skills