Dr. Shanmugakumar Murugesan
Chennai, Tamil Nadu, India
4K followers
500 connections
About
Agriculture Technology enthusiast, Wishing to build an Affordable Technology for our…
Activity
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FYI. If you're aware of any early-stage climate startups working in clean energy, electric mobility, waste management, ESG, batteries, or sustainable…
FYI. If you're aware of any early-stage climate startups working in clean energy, electric mobility, waste management, ESG, batteries, or sustainable…
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Thanks startupro.in for the feature.
Thanks startupro.in for the feature.
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Choose Your Hard 💡 Life will always have its challenges, but we have the power to choose which ones we face. Whether it's in our relationships…
Choose Your Hard 💡 Life will always have its challenges, but we have the power to choose which ones we face. Whether it's in our relationships…
Liked by Dr. Shanmugakumar Murugesan
Experience
Education
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Indian Institute of Information Technology Design & Manufacturing Kancheepuram
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Activities and Societies: Research Affairs Secretary Member of Guidance and Counselling Committee.
Thesis Title - On the Development of Novel High-Performance Packet Classification
Architectures -
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Activities and Societies: Active IEEE Student member Active coordinator for International conference (IConDM-2013) PUBLICATIONS: Shanmugakumar et.al “High Precision and High-Speed Handheld Scientific Calculator Design Using Hardware-based CORDIC Algorithm” Procedia Engineering, Vol-64, page no 56-64, July 2013. Link: http://www.sciencedirect.com/science/journal/18777058/64
Research Project Details:
1) High-performance Arithmetic Circuit design for solving elementary function using CORDIC Algorithm- Implementing a Complete CORDIC Architecture in a pipelined fashion and reducing the number of iterations to compute the result using redundant scaling factor.
2) High-performance Floating point MAC Design for DSP Application- Designed Complete Multiplication and Accumulation unit (MAC) using Wallace tree multiplier with pipelined fashion and reduced the…Research Project Details:
1) High-performance Arithmetic Circuit design for solving elementary function using CORDIC Algorithm- Implementing a Complete CORDIC Architecture in a pipelined fashion and reducing the number of iterations to compute the result using redundant scaling factor.
2) High-performance Floating point MAC Design for DSP Application- Designed Complete Multiplication and Accumulation unit (MAC) using Wallace tree multiplier with pipelined fashion and reduced the computation time by providing feedback result to a multiplier block, compatible for floating point(IEEE 754) MAC.
3) Low cost ADD ON for Two Wheeler (Hybrid Vehicle Module).
Product Prototype:
1) Wind Oscillator - Produce Electricity from windows, Flexible membrane to make vibration from wind flow, converting vibration to Electricity using a copper coil and neodymium magnet.
2) Car Parking Monitoring System - Using embedded Controller, parking lot availability, parking fee calculation are done with MSP430.
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Publications
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A Novel Range Matching Architecture for Packet Classification Without Rule Expansion
ACM Transactions on Design Automation of Electronic Systems (TODAES)
The speed requirement for the routing table lookup and the packet classification is rapidly increasing due to the increase in the number of packets needed to be processed per second. The hardware-based packet classification relies on ternary content addressable memory (TCAM) to meet this speed requirement. However, TCAM consumes huge power and also supports only for longest prefix match and exact match, where the classification rule also has a range match (RM) field. Hence, it is mandatory to…
The speed requirement for the routing table lookup and the packet classification is rapidly increasing due to the increase in the number of packets needed to be processed per second. The hardware-based packet classification relies on ternary content addressable memory (TCAM) to meet this speed requirement. However, TCAM consumes huge power and also supports only for longest prefix match and exact match, where the classification rule also has a range match (RM) field. Hence, it is mandatory to encode the RM into prefix match to accommodate the rule in TCAM. In the worst case, one rule is encoded into (2W-2)2 rules (where W is a number of bits to represent range). This work proposes a novel RM architecture, and a detailed analysis of the range field on the standard dataset and the real-life classifier rules are presented. In the literature, the existing RM architecture is used to avoid the range to prefix conversion, but due to the serial operation, it lacks in performance. For constant time lookup, TCAM is the best option, but it does not support RM. The proposed architecture takes one clock cycle for RM and does not require any encoding/ conversion. Hence, there will be a single entry for every rule. It is observed that just 4% of the two-dimensional range rules are present in this dataset, and it will increase the rule set size by 4 times in the best case and nearly 30 times in the worst case. The proposed RM circuit is operated in parallel with TCAM without compromising the speed, and this circuit saves huge power around 70% and the area around 61%, where the range to prefix conversion/encoding is completely avoided. The proposed architecture is well suited for current IPv4- and IPv6-based networks, as well as in software-defined networks in the near future.
Other authorsSee publication -
High Precision and High Speed Handheld Scientific Calculator Design Using Hardware based CORDIC Algorithm
Procedia Engineering Journal - Elsevier
Implementing a Complete CORDIC Architecture in pipelined fashion and reducing the number of iterations to compute the result using redundant scaling factor”. The complete design is described in Verilog HDL, simulated using Xilinx ISE simulator and Timing, Area, Power are Analyzed in Cadence 6.1 -RTL Compiler (RC).
Other authorsSee publication
Courses
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Modern Agriculture Technology
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Network Architecture
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VLSI Design
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Languages
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Tamil
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English
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Organizations
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IEEE Student Member
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India has successfully launched its first reusable hybrid rocket, 'RHUMI-1,' developed by Tamil Nadu-based startup !Space Zone India in collaboration…
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We thank V Tech Chennai for opting for a honeycomb pallet cum box replacing wood. V Tech saved money. www.honeycore.in
We thank V Tech Chennai for opting for a honeycomb pallet cum box replacing wood. V Tech saved money. www.honeycore.in
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#IITguwahati has opened its advertisement for the Institute #PostDoctoralFellowship, available to both #National and #International doctoral degree…
#IITguwahati has opened its advertisement for the Institute #PostDoctoralFellowship, available to both #National and #International doctoral degree…
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🌟 **Celebrating Excellence at Shiv Nadar University Chennai!** 🌟 We're thrilled to announce that five of our brilliant students from the 2026…
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Innovation starts with how we see the world. It's about staying curious, asking questions, and being willing to take unexpected paths. Best ideas…
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Meet Ishwariya, Director of BLINC SMART HOMES, a 20CR company that stands as India's only brand connecting with almost all ecosystems to transform…
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We are happy to announce that Serigreen Technologies has been selected as one of the top 50 startups in the TATA Social Enterprise Challenge (TSEC)…
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