IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
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Updated
Nov 29, 2020 - VHDL
IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
Tests to evaluate the support of VHDL 2008 and VHDL 2019 features
A flexible and scalable development platform for modern FPGA projects.
Interfacing VHDL and foreign languages with VUnit
VUnit-by-HGB is a VS-Code extension which enables the testexplorer for VUnit projects.
SublimeText3 bits for Quartus, ModelSim, and VUnit Integration mirror of https://phabricator.kairohm.dev/diffusion/10/
Write unit tests against your Vue components using mocha and @vue/test-utils
Docker-based Jenkins swarm slave client with GHDL software
Simulating the NEORV32 RISC-V Processor using the VUnit testing framework.
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