30 Days of Verilog: Dive into digital circuits with a month of Verilog coding challenges. From logic gates to FSMs, sharpen your skills and simulate your designs. Let's code and conquer circuits!

This Repo contains Codes of RTLs for implementation of various circuit designs using Verilog in Xilinx ISE 14.7 and sometimes Modelsim tools

"Mastering Verilog Programming for Digital Circuit Design: RTL and TestBench Codes Practice with HDL-BITS"

Repository for RTL building blocks #100daysofrtl VERILOG VHDL System Verilog

To implement the elevator controller, we used Verilog as HDL. The focus of our project was the implementation and verification of a controller for a basic elevator functionality. We also proposed a methodology that utilizes the SCAN algorithm to enhance the efficiency and reliability of the controller.