This is the gem5 simulator for Xiangshan (XS-GEM5), which currently scores similar with Nanhu on SPEC CPU 2006. XS-GEM5 is enhanced with

• Xiangshan RVGCpt: a cross-platform full-system checkpoint for RISC-V.
• Xiangshan online Difftest: an API to check execution results online.
• Frontend microarchitecture calibrated with Xiangshan V2 (Nanhu): Decoupled frontend, TAGESC, and ITTAGE, which performance better than LTAGE and TAGE-SCL shipped in official version on SPECCPU.
• Instruction latency calibrated with Nanhu
• Cache hierarchy, latency, and prefetchers calibrated with Nanhu.
• A fixed Multi-Prefetcher framework with VA-PA translation support
• A fixed BOP prefetcher
• Parallel RV PTW (Page Table Walker) and walking state coalescing
• Cascaded FMA
• Move elimination
• L2 TLB and TLB prefetching (coming soon).
• Other functional or performance bug fixes.

• Use GCC > 9.4.0.
• Install libboost.

cd gem5
scons build/RISCV/gem5.opt --gold-linker
export gem5_home=`pwd`

Please refer to the checkpoint tutorial for Xiangshan and Build Linux kernel for Xiangshan

The process of SimPoint checkpointing includes 3 individual steps

1. SimPoint Profiling to get BBVs. (To save space, they often output in compressed formats such as bbv.gz.)
2. SimPoint clustering. You can also opt to Python and sk-learn to do k-means clustering. (In this step, what is typically obtained are the positions selected by SimPoint and their weights.)
3. Taking checkpoints according to clustering results. (In the RVGCpt process, this step generates the checkpoints that will be used for simulation.)

If you have problem generating SPECCPU checkpoints, following links might help you.

• The video to build SPECCPU, put it in Linux, and run it in NEMU to get SimPoint BBVs (step 1)
• The document to do SimPoint clustering based on BBVs and take simpoint checkpoints (step 2 & 3)

The Difftest framework used in XS-GEM5 is similar to the one used in Xiangshan. Please use the gem5-ref-main branch of NEMU for difftest with XS-GEM5.

git clone https://github.com/OpenXiangShan/NEMU.git -b gem5-ref-main
cd NEMU
export NEMU_HOME=`pwd`
make riscv64-nohype-ref_defconfig
make menuconfig  # then save configs
make -j 10

Then the contents of build directory should be

build
|-- obj-riscv64-nemu-interpreter-so
|   `-- src
`-- riscv64-nemu-interpreter-so

then use riscv64-nemu-interpreter-so as reference for GEM5,

export ref_so=`realpath build/riscv64-nemu-interpreter-so`

# This is not full command, but a piece of example.
$gem5_home/build/gem5.opt ... --enable-difftest --difftest-ref-so $ref_so ...

Refer to The readme for DRAMSim3 to install DRAMSim3.

Notes:

• Must rebuild gem5 after install DRAMSim3
• Must use DRAMSim3 with our costumized config

$gem5_home/build/gem5.opt ... --mem-type=DRAMsim3 --dramsim3-ini=$gem5_home/xiangshan_DDR4_8Gb_x8_2400.ini ...

see The example running script

The README for official GEM5 is here: Original README