A hardware component library developed with ROHD. This library aims to collect a set of reusable, configurable components that can be leveraged in other designs. These components are also intended as good examples of ROHD hardware implementations.

This project is a work in progress! Initial components are primarily focused on correctness, and there is room for optimization from there. Please feel free to contribute or provide feedback. Check out CONTRIBUTING for details on how to contribute.

This project is not intended to be the only place for reusable hardware components developed in ROHD. It's not even intended to be the only library. Contributions are welcomed to this library, but developers are also welcome to build independent packages or libraries, even if they may overlap.

• All components should be Modules so that they are convertible to SystemVerilog
• Components should be general and easily reusable
• Components should be as configurable as may be useful
• Components must be extensively tested
• Components must have excellent documentation and examples
• The first component in a category should be the simplest
• Focus on breadth of component types before depth in one type
• Add extensions to other classes to make component usage easier, when appropriate

Below is a list of components either already or planning to be implemented.

• Encoders
  • 1-hot to Binary
  • Binary to 1-hot
  • Gray to Binary
  • Binary to Gray
  • Priority
• Arbiters
  • Priority
  • Round-robin (WIP)
• FIFO
  • Synchronous
  • Asynchronous
  • Bubble Generating
• Find
  • Find N'th bit=X
  • Find N'th bit=X from end
  • Min
  • Max
• Count
  • Count bit=X
• Sort (WIP)
• Arithmetic
  • Prefix Trees (WIP)
  • Adders
  • Subtractors
  • Multipliers
    • Pipelined Integer Multiplier (WIP)
  • Dividers
  • Log
• Rotate
  • Dynamic and fixed amounts
  • Left and right
  • Includes extensions on Logic and LogicValue
• Counter
• LFSR (WIP)
• Error checking
  • ECC
  • CRC
  • Parity
• Data flow
  • Ready/Valid
  • Connect/Disconnect (e.g. SFI)
  • Widening
  • Narrowing
  • Crediting
  • NoC's
    • Coherent
    • Non-Coherent
• Memory
  • Register Files
    • Flop-based
    • Latch-based
  • Replacement Policies
    • LRU

2023 March 30
Author: Max Korbel <[email protected]>

Copyright (C) 2023 Intel Corporation
SPDX-License-Identifier: BSD-3-Clause