MIPS 32 bits Single Cycle CPU

This project is based on the book Digital Design and Computer Architecture and its example for a MIPS cpu written in Systemverilog.

The designs are in the folder sources_1 and the top module is MipsTopIO.sv. The program files are twoPlusTwo.asm and twoPlusTwo.dat.

Name		Name	Last commit message	Last commit date
Latest commit History 15 Commits
constrs_1/new		constrs_1/new
sim_1/new		sim_1/new
sources_1/new		sources_1/new
utils_1/imports/synth_1		utils_1/imports/synth_1
.gitignore		.gitignore
README.md		README.md

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