/* General "disassemble this chunk" code. Used for debugging. */

#include "qemu/osdep.h"

#include "qemu-common.h"

#include "disas/bfd.h"

#include "elf.h"

#include "cpu.h"

#include "disas/disas.h"

#include "disas/capstone.h"

typedef struct CPUDebug {

struct disassemble_info info;

CPUState *cpu;

} CPUDebug;

/* Filled in by elfload.c. Simplistic, but will do for now. */

struct syminfo *syminfos = NULL;

/* Get LENGTH bytes from info's buffer, at target address memaddr.

Transfer them to myaddr. */

int

buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,

struct disassemble_info *info)

{

if (memaddr < info->buffer_vma

|| memaddr length > info->buffer_vma info->buffer_length)

/* Out of bounds. Use EIO because GDB uses it. */

return EIO;

memcpy (myaddr, info->buffer (memaddr - info->buffer_vma), length);

return 0;

}

/* Get LENGTH bytes from info's buffer, at target address memaddr.

Transfer them to myaddr. */

static int

target_read_memory (bfd_vma memaddr,

bfd_byte *myaddr,

int length,

struct disassemble_info *info)

{

CPUDebug *s = container_of(info, CPUDebug, info);

cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);

return 0;

}

/* Print an error message. We can assume that this is in response to

an error return from buffer_read_memory. */

void

perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)

{

if (status != EIO)

/* Can't happen. */

(*info->fprintf_func) (info->stream, "Unknown error %d\n", status);

else

/* Actually, address between memaddr and memaddr len was

out of bounds. */

(*info->fprintf_func) (info->stream,

"Address 0x%" PRIx64 " is out of bounds.\n", memaddr);

}

/* This could be in a separate file, to save minuscule amounts of space

in statically linked executables. */

/* Just print the address is hex. This is included for completeness even

though both GDB and objdump provide their own (to print symbolic

addresses). */

void

generic_print_address (bfd_vma addr, struct disassemble_info *info)

{

(*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);

}

/* Print address in hex, truncated to the width of a host virtual address. */

static void

generic_print_host_address(bfd_vma addr, struct disassemble_info *info)

{

uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));

generic_print_address(addr & mask, info);

}

/* Just return the given address. */

int

generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)

{

return 1;

}

bfd_vma bfd_getl64 (const bfd_byte *addr)

{

unsigned long long v;

v = (unsigned long long) addr[0];

v |= (unsigned long long) addr[1] << 8;

v |= (unsigned long long) addr[2] << 16;

v |= (unsigned long long) addr[3] << 24;

v |= (unsigned long long) addr[4] << 32;

v |= (unsigned long long) addr[5] << 40;

v |= (unsigned long long) addr[6] << 48;

v |= (unsigned long long) addr[7] << 56;

return (bfd_vma) v;

}

bfd_vma bfd_getl32 (const bfd_byte *addr)

{

unsigned long v;

v = (unsigned long) addr[0];

v |= (unsigned long) addr[1] << 8;

v |= (unsigned long) addr[2] << 16;

v |= (unsigned long) addr[3] << 24;

return (bfd_vma) v;

}

bfd_vma bfd_getb32 (const bfd_byte *addr)

{

unsigned long v;

v = (unsigned long) addr[0] << 24;

v |= (unsigned long) addr[1] << 16;

v |= (unsigned long) addr[2] << 8;

v |= (unsigned long) addr[3];

return (bfd_vma) v;

}

bfd_vma bfd_getl16 (const bfd_byte *addr)

{

unsigned long v;

v = (unsigned long) addr[0];

v |= (unsigned long) addr[1] << 8;

return (bfd_vma) v;

}

bfd_vma bfd_getb16 (const bfd_byte *addr)

{

unsigned long v;

v = (unsigned long) addr[0] << 24;

v |= (unsigned long) addr[1] << 16;

return (bfd_vma) v;

}

static int print_insn_objdump(bfd_vma pc, disassemble_info *info,

const char *prefix)

{

int i, n = info->buffer_length;

uint8_t *buf = g_malloc(n);

info->read_memory_func(pc, buf, n, info);

for (i = 0; i < n; i) {

if (i % 32 == 0) {

info->fprintf_func(info->stream, "\n%s: ", prefix);

}

info->fprintf_func(info->stream, "x", buf[i]);

}

g_free(buf);

return n;

}

static int print_insn_od_host(bfd_vma pc, disassemble_info *info)

{

return print_insn_objdump(pc, info, "OBJD-H");

}

static int print_insn_od_target(bfd_vma pc, disassemble_info *info)

{

return print_insn_objdump(pc, info, "OBJD-T");

}

#ifdef CONFIG_CAPSTONE

/* Temporary storage for the capstone library. This will be alloced via

malloc with a size private to the library; thus there's no reason not

to share this across calls and across host vs target disassembly. */

static __thread cs_insn *cap_insn;

/* Initialize the Capstone library. */

/* ??? It would be nice to cache this. We would need one handle for the

host and one for the target. For most targets we can reset specific

parameters via cs_option(CS_OPT_MODE, new_mode), but we cannot change

CS_ARCH_* in this way. Thus we would need to be able to close and

re-open the target handle with a different arch for the target in order

to handle AArch64 vs AArch32 mode switching. */

static cs_err cap_disas_start(disassemble_info *info, csh *handle)

{

cs_mode cap_mode = info->cap_mode;

cs_err err;

cap_mode = (info->endian == BFD_ENDIAN_BIG ? CS_MODE_BIG_ENDIAN

: CS_MODE_LITTLE_ENDIAN);

err = cs_open(info->cap_arch, cap_mode, handle);

if (err != CS_ERR_OK) {

return err;

}

/* ??? There probably ought to be a better place to put this. */

if (info->cap_arch == CS_ARCH_X86) {

/* We don't care about errors (if for some reason the library

is compiled without AT&T syntax); the user will just have

to deal with the Intel syntax. */

cs_option(*handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT);

}

/* "Disassemble" unknown insns as ".byte W,X,Y,Z". */

cs_option(*handle, CS_OPT_SKIPDATA, CS_OPT_ON);

/* Allocate temp space for cs_disasm_iter. */

if (cap_insn == NULL) {

cap_insn = cs_malloc(*handle);

if (cap_insn == NULL) {

cs_close(handle);

return CS_ERR_MEM;

}

}

return CS_ERR_OK;

}

/* Disassemble SIZE bytes at PC for the target. */

static bool cap_disas_target(disassemble_info *info, uint64_t pc, size_t size)

{

uint8_t cap_buf[1024];

csh handle;

cs_insn *insn;

size_t csize = 0;

if (cap_disas_start(info, &handle) != CS_ERR_OK) {

return false;

}

insn = cap_insn;

while (1) {

size_t tsize = MIN(sizeof(cap_buf) - csize, size);

const uint8_t *cbuf = cap_buf;

target_read_memory(pc csize, cap_buf csize, tsize, info);

csize = tsize;

size -= tsize;

while (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) {

(*info->fprintf_func)(info->stream,

"0x" PRIx64 ": %-12s %s\n",

insn->address, insn->mnemonic,

insn->op_str);

}

/* If the target memory is not consumed, go back for more... */

if (size != 0) {

/* ... taking care to move any remaining fractional insn

to the beginning of the buffer. */

if (csize != 0) {

memmove(cap_buf, cbuf, csize);

}

continue;

}

/* Since the target memory is consumed, we should not have

a remaining fractional insn. */

if (csize != 0) {

(*info->fprintf_func)(info->stream,

"Disassembler disagrees with translator "

"over instruction decoding\n"

"Please report this to [email protected]\n");

}

break;

}

cs_close(&handle);

return true;

}

/* Disassemble SIZE bytes at CODE for the host. */

static bool cap_disas_host(disassemble_info *info, void *code, size_t size)

{

csh handle;

const uint8_t *cbuf;

cs_insn *insn;

uint64_t pc;

if (cap_disas_start(info, &handle) != CS_ERR_OK) {

return false;

}

insn = cap_insn;

cbuf = code;

pc = (uintptr_t)code;

while (cs_disasm_iter(handle, &cbuf, &size, &pc, insn)) {

(*info->fprintf_func)(info->stream,

"0x" PRIx64 ": %-12s %s\n",

insn->address, insn->mnemonic,

insn->op_str);

}

if (size != 0) {

(*info->fprintf_func)(info->stream,

"Disassembler disagrees with TCG over instruction encoding\n"

"Please report this to [email protected]\n");

}

cs_close(&handle);

return true;

}

#if !defined(CONFIG_USER_ONLY)

/* Disassemble COUNT insns at PC for the target. */

static bool cap_disas_monitor(disassemble_info *info, uint64_t pc, int count)

{

uint8_t cap_buf[32];

csh handle;

cs_insn *insn;

size_t csize = 0;

if (cap_disas_start(info, &handle) != CS_ERR_OK) {

return false;

}

insn = cap_insn;

while (1) {

/* We want to read memory for one insn, but generically we do not

know how much memory that is. We have a small buffer which is

known to be sufficient for all supported targets. Try to not

read beyond the page, Just In Case. For even more simplicity,

ignore the actual target page size and use a 1k boundary. If

that turns out to be insufficient, we'll come back around the

loop and read more. */

uint64_t epc = QEMU_ALIGN_UP(pc csize 1, 1024);

size_t tsize = MIN(sizeof(cap_buf) - csize, epc - pc);

const uint8_t *cbuf = cap_buf;

/* Make certain that we can make progress. */

assert(tsize != 0);

info->read_memory_func(pc, cap_buf csize, tsize, info);

csize = tsize;

if (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) {

(*info->fprintf_func)(info->stream,

"0x" PRIx64 ": %-12s %s\n",

insn->address, insn->mnemonic,

insn->op_str);

if (--count <= 0) {

break;

}

}

memmove(cap_buf, cbuf, csize);

}

cs_close(&handle);

return true;

}

#endif /* !CONFIG_USER_ONLY */

#else

# define cap_disas_target(i, p, s) false

# define cap_disas_host(i, p, s) false

# define cap_disas_monitor(i, p, c) false

#endif /* CONFIG_CAPSTONE */

/* Disassemble this for me please... (debugging). 'flags' has the following

values:

i386 - 1 means 16 bit code, 2 means 64 bit code

ppc - bits 0:15 specify (optionally) the machine instruction set;

bit 16 indicates little endian.

other targets - unused

*/

void target_disas(FILE *out, CPUState *cpu, target_ulong code,

target_ulong size, int flags)

{

CPUClass *cc = CPU_GET_CLASS(cpu);

target_ulong pc;

int count;

CPUDebug s;

INIT_DISASSEMBLE_INFO(s.info, out, fprintf);

s.cpu = cpu;

s.info.read_memory_func = target_read_memory;

s.info.read_memory_inner_func = NULL;

s.info.buffer_vma = code;

s.info.buffer_length = size;

s.info.print_address_func = generic_print_address;

s.info.cap_arch = -1;

s.info.cap_mode = 0;

#ifdef TARGET_WORDS_BIGENDIAN

s.info.endian = BFD_ENDIAN_BIG;

#else

s.info.endian = BFD_ENDIAN_LITTLE;

#endif

if (cc->disas_set_info) {

cc->disas_set_info(cpu, &s.info);

}

if (s.info.cap_arch >= 0 && cap_disas_target(&s.info, code, size)) {

return;

}

if (s.info.print_insn == NULL) {

s.info.print_insn = print_insn_od_target;

}

for (pc = code; size > 0; pc = count, size -= count) {

fprintf(out, "0x" TARGET_FMT_lx ": ", pc);

count = s.info.print_insn(pc, &s.info);

fprintf(out, "\n");

if (count < 0)

break;

if (size < count) {

fprintf(out,

"Disassembler disagrees with translator over instruction "

"decoding\n"

"Please report this to [email protected]\n");

break;

}

}

}

/* Disassemble this for me please... (debugging). */

void disas(FILE *out, void *code, unsigned long size)

{

uintptr_t pc;

int count;

CPUDebug s;

int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;

INIT_DISASSEMBLE_INFO(s.info, out, fprintf);

s.info.print_address_func = generic_print_host_address;

s.info.buffer = code;

s.info.buffer_vma = (uintptr_t)code;

s.info.buffer_length = size;

s.info.cap_arch = -1;

s.info.cap_mode = 0;

#ifdef HOST_WORDS_BIGENDIAN

s.info.endian = BFD_ENDIAN_BIG;

#else

s.info.endian = BFD_ENDIAN_LITTLE;

#endif

#if defined(CONFIG_TCG_INTERPRETER)

print_insn = print_insn_tci;

#elif defined(__i386__)

s.info.mach = bfd_mach_i386_i386;

print_insn = print_insn_i386;

#elif defined(__x86_64__)

s.info.mach = bfd_mach_x86_64;

print_insn = print_insn_i386;

#elif defined(_ARCH_PPC)

s.info.disassembler_options = (char *)"any";

print_insn = print_insn_ppc;

#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)

print_insn = print_insn_arm_a64;

#elif defined(__alpha__)

print_insn = print_insn_alpha;

#elif defined(__sparc__)

print_insn = print_insn_sparc;

s.info.mach = bfd_mach_sparc_v9b;

#elif defined(__arm__)

print_insn = print_insn_arm;

#elif defined(__MIPSEB__)

print_insn = print_insn_big_mips;

#elif defined(__MIPSEL__)

print_insn = print_insn_little_mips;

#elif defined(__m68k__)

print_insn = print_insn_m68k;

#elif defined(__s390__)

print_insn = print_insn_s390;

#elif defined(__hppa__)

print_insn = print_insn_hppa;

#endif

if (s.info.cap_arch >= 0 && cap_disas_host(&s.info, code, size)) {

return;

}

if (print_insn == NULL) {

print_insn = print_insn_od_host;

}

for (pc = (uintptr_t)code; size > 0; pc = count, size -= count) {

fprintf(out, "0x" PRIxPTR ": ", pc);

count = print_insn(pc, &s.info);

fprintf(out, "\n");

if (count < 0)

break;

}

}

/* Look up symbol for debugging purpose. Returns "" if unknown. */

const char *lookup_symbol(target_ulong orig_addr)

{

const char *symbol = "";

struct syminfo *s;

for (s = syminfos; s; s = s->next) {

symbol = s->lookup_symbol(s, orig_addr);

if (symbol[0] != '\0') {

break;

}

}

return symbol;

}

#if !defined(CONFIG_USER_ONLY)

#include "monitor/monitor.h"

static int monitor_disas_is_physical;

static int

monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,

struct disassemble_info *info)

{

CPUDebug *s = container_of(info, CPUDebug, info);

if (monitor_disas_is_physical) {

cpu_physical_memory_read(memaddr, myaddr, length);

} else {

cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);

}

return 0;

}

/* Disassembler for the monitor.

See target_disas for a description of flags. */

void monitor_disas(Monitor *mon, CPUState *cpu,

target_ulong pc, int nb_insn, int is_physical, int flags)

{

CPUClass *cc = CPU_GET_CLASS(cpu);

int count, i;

CPUDebug s;

INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);

s.cpu = cpu;

monitor_disas_is_physical = is_physical;

s.info.read_memory_func = monitor_read_memory;

s.info.print_address_func = generic_print_address;

s.info.buffer_vma = pc;

s.info.cap_arch = -1;

s.info.cap_mode = 0;

#ifdef TARGET_WORDS_BIGENDIAN

s.info.endian = BFD_ENDIAN_BIG;

#else

s.info.endian = BFD_ENDIAN_LITTLE;

#endif

if (cc->disas_set_info) {

cc->disas_set_info(cpu, &s.info);

}

if (s.info.cap_arch >= 0 && cap_disas_monitor(&s.info, pc, nb_insn)) {

return;

}

if (!s.info.print_insn) {

monitor_printf(mon, "0x" TARGET_FMT_lx

": Asm output not supported on this arch\n", pc);

return;

}

for(i = 0; i < nb_insn; i ) {

monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);

count = s.info.print_insn(pc, &s.info);

monitor_printf(mon, "\n");

if (count < 0)

break;

pc = count;

}

}

#endif