target/i386: Fix wrong XSAVE feature names

The previous patch changes the name from FEAT_XSAVE_COMP_{LO|HI} to FEAT_XSAVE_XCR0_{LO|HI}, the changes for CPUID.0x12.0x1 should be FEAT_XSAVE_XCR0_{LO|HI}, the SGX can"t work in VM if these are not right Fixes: 301e906 ("target/i386: Enable support for XSAVES based features") Signed-off-by: Xiaocheng Dong <[email protected]>
kata-containers · Feb 23, 2023 · 95ab1ef · 95ab1ef
1 parent a2d21f5
commit 95ab1ef
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
@@ -5590,8 +5590,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
         } else {
             *eax &= env->features[FEAT_SGX_12_1_EAX];
             *ebx &= 0; /* ebx reserve */
-            *ecx &= env->features[FEAT_XSAVE_XSS_LO];
-            *edx &= env->features[FEAT_XSAVE_XSS_HI];
+            *ecx &= env->features[FEAT_XSAVE_XCR0_LO];
+            *edx &= env->features[FEAT_XSAVE_XCR0_HI];
 
             /* FP and SSE are always allowed regardless of XSAVE/XCR0. */
             *ecx |= XSTATE_FP_MASK | XSTATE_SSE_MASK;