SRAM Design using OpenSource Applications.

• SRAM Design
• Basic Architectural Block Diagram
• Pre Layout
  • 6T Memory cell
  • Sense Amplifier
  • Write Driver
  • Tri-State Buffer
  • Pre-Charge Circuit
  • Simulation of 6T SRAM Cell
• Pre Layout
• Installation
• Future Works
• Contact Information

The project is focused on the design of 1k*32-bit 6T SRAM memory using opensource memory compiler OpenRAM. For the design of custom memory array, memory compiler takes in SPICE netlists, Layout files of the custom cells designed and few other parameters and generates a SRAM memory array.

SRAM Specs - Memory Size of 1k x 32-bit, Operating voltage - 5V, Technology PDK file - 0.5um SCMOS Technology from MOSIS.

• For more information on OpenRAM. Click here

To clone the Repository and download the Netlist files for Simulation, Enter the following commands in your terminal.

$  sudo apt install -y git
$  git clone https://github.com/iamkrvikash/OpenSRAM
$  cd OpenRAM/Spice/PreLayout

ngspice tran_dc.sp

ngspice tb_tran.sp

• To download EDA tools (NgSpice, Magic, Netgen) on your System. Follow Github Page and Clone the Repo.
• git clone https://github.com/silicon-vlsi/project2020

• To create the layout using Magic.
• To do Post Layout Simulations.
• Implementing the above designs in OpenRAM Compiler and Compiling the SRAM.

• Vikash Kumar, Undergraduate Student, SIT BBSR [email protected]