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This repository has been archived by the owner on Jul 10, 2024. It is now read-only.

Tags: hex-five/multizone-fpga

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v2.0.0

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2021-10-19 (v2.0.0)

- add support for the Arty A7 100T board
- update flash part for Arty A7 35T board
- remove many unnecessary files
- increase Java memory to speed up the build
- test with Debian 11.1 bullseye 5.10.70-1 (2021-09-30)
- test with Vivado 2021.1
- test with Hex Five riscv-gnu-toolchain-20210618
- test with MultiZone Security TEE v2.2.1
- test with MultiZone Trusted Firmware v2.2.1
- update release assets with new bitstreams
- update readme

v1.0.1-stable

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Apply Hex-Five JEDEC ID

v1.0.0-stable

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Modify E300 to X300

Modifications:
- Increase clock to 65 MHz
- Enable user mode
- Increase HW breakpoints to 8
- Add 2 perf counters, hpmcounter3 and hpmcounter4
- Add Xilinx EthernetLite core for Arty
- Make icache 4-way set associative
- Map ITIM at 0x0800_0000
- Expand DTIM to 64k
- Add 3 local interrupts and map GPIO BTN0-BTN2 to them
- Add temporary PMOD JA remaps for robotic arm