Model clock-domain crossings between transformed-RTL model and endpoints #49
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Associated midas PR: ucb-bar/midas#90. See that PR for more detail.
As for FireSim specific stuff:
Some unrelated changes that could be dropped:
Ultimately we probably want to model 1:3 or 1:2 division between Rocket Chip and the DRAM model by default but i'm seeing some weird behavior in the QC-FRFCFS instances that must be addressed before that can even be considered.