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Bump to chisel3.5.6/latest rocketchip #1476

Merged
merged 4 commits into from
Apr 20, 2023
Merged

Bump to chisel3.5.6/latest rocketchip #1476

merged 4 commits into from
Apr 20, 2023

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jerryz123
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@jerryz123 jerryz123 commented Mar 21, 2023 •
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UI / API Impact

Verilog / AGFI Compatibility

Contributor Checklist

  • Is this PR's title suitable for inclusion in the changelog and have you added a changelog:<topic> label?
  • Did you add Scaladoc/docstring/doxygen to every public function/method?
  • Did you add at least one test demonstrating the PR?
  • Did you delete any extraneous prints/debugging code?
  • Did you state the UI / API impact?
  • Did you specify the Verilog / AGFI compatibility impact?
  • If applicable, did you regenerate and publicly share default AGFIs?
  • If applicable, did you apply the ci:fpga-deploy label?
  • If applicable, did you apply the Please Backport label?

Reviewer Checklist (only modified by reviewer)

Note: to run CI on PRs from forks, comment @Mergifyio copy main and manage the change from the new PR.

  • Is the title suitable for inclusion in the changelog and does the PR have a changelog:<topic> label?
  • Did you mark the proper release milestone?
  • Did you check whether all relevant Contributor checkboxes have been checked?

@jerryz123 jerryz123 marked this pull request as ready for review April 6, 2023 03:31
abejgonzalez
abejgonzalez approved these changes Apr 20, 2023
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LGTM

@abejgonzalez
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Can you address the merge conflict then we can merge this in? (no AGFIs need to be regenerated)

@abejgonzalez abejgonzalez merged commit 8c301ad into main Apr 20, 2023
@abejgonzalez abejgonzalez deleted the chisel356 branch April 20, 2023 16:57
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@abejgonzalez abejgonzalez abejgonzalez approved these changes

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@jerryz123 @abejgonzalez