fix: only pass TSC deadline feature if the host supports it

AMD hosts do not have TSC deadline enabled, and that seems to cause issues like in #4099. Closes #4099 Signed-off-by: Pablo Barbáchano <[email protected]>
firecracker-microvm · Jun 26, 2024 · f061302 · f061302
1 parent 1b56530
commit f061302
Showing 1 changed file with 8 additions and 1 deletion.
diff --git a/src/vmm/src/cpu_config/x86_64/cpuid/normalize.rs b/src/vmm/src/cpu_config/x86_64/cpuid/normalize.rs
@@ -247,7 247,14 @@ impl super::Cpuid {
  // operation using a TSC deadline value.
  //
  // tsc_deadline: 24,
- set_bit(&mut leaf_1.result.ecx, ECX_TSC_DEADLINE_BITINDEX, true);
  let host_leaf_1 = cpuid(0x1);
  // Pass-through the value of the host
  let host_tsc_deadline = ((1 << ECX_TSC_DEADLINE_BITINDEX) & host_leaf_1.ecx) != 0;
  set_bit(
  &mut leaf_1.result.ecx,
  ECX_TSC_DEADLINE_BITINDEX,
  host_tsc_deadline,
  );
 
  // Hypervisor bit
  set_bit(&mut leaf_1.result.ecx, ECX_HYPERVISOR_BITINDEX, true);