Transmits AM radio on computers without radio transmitting hardware.

3-stage RV32IMACZb* processor with debug

Experimental WASM Microkernel Operating System

SonicBOOM: The Berkeley Out-of-Order Machine

(System)Verilog verification code injector - for automatically testing designs against single bit failures

A single-wire bi-directional chip-to-chip interface for FPGAs

Package manager and build abstraction tool for FPGA/ASIC development

A current mode buck converter on the SKY130 PDK

FPGA based transmitter

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

32-bit Fixed-Point Embedded 3D Graphics Processor

Another tiny RISC-V implementation

Verilog VPI VGA Simulator using SDL

A complete open-source design-for-testing (DFT) Solution

DEPRECATED! RISC-V PLIC Compilant AXI4-Lite controller.

SERV - The SErial RISC-V CPU

RISC-V CPU Core (RV32IM)

32-bit Superscalar RISC-V CPU

FTDI FT600 SuperSpeed USB3.0 to AXI bus master

ArmleoCPU - RISC-V CPU RV64GC, SMP, Linux, Doom. Work in progress to execute first instruction with new feature set

Allows commandline builds, and project creation for Altera's Quartus II

Oldland CPU - a 32-bit RISC FPGA CPU including RTL tools

This project is not maintained, please use https://github.com/espressif/esp-at.

A simple emulator for the Chip-8 Programming Language

RTC support library for the Maple board from Leaflabs

Arduino STM32. Hardware files to support STM32 boards, on Arduino IDE 1.8.x including LeafLabs Maple and other generic STM32F103 boards

A brief computer graphics / rendering course

Emscripten: An LLVM-to-WebAssembly Compiler