Single Cycle CPU using the RV32I Base Instruction set

RISC-V Instruction Set Manual

RISC-V Programs is a collection of programs writen in C and Assembly for various RISC-V implementations.

From the creator of the BEAN-1 comes the BEAN-2....

Archive of all the different general purpose verilog modules that I build

Rudimentary compiler for bare bones RV32I on my custom Single Cycle CPU

Binary Execution and Analysis Node

Transcription, forced alignment, and audio indexing with OpenAI's Whisper