A broad exposure to computer system structure and networking including software abstractions in operating systems for orchestrating the usage of the computing resources.

Provide a broad exposure to computer system structure and networking including software abstractions in operating systems for orchestrating the usage of the computing resources:

• Organization of the processor
• Memory hierarchy
• Storage devices
• Parallel processors
• Networking hardware
• Software abstractions in the operating systems for orchestrating their usage
• Networking protocols to connect the computer system to its environment

• (Competency Knowledge) Understand the difference between RISC and CISC architectures. Be able to identify the strengths and weaknesses of each paradigm.
• (Competency Knowledge) Understand and be able to explain runtime system concepts such as procedure calls and register saving. Be able to write recursive subroutines in assembly.
• (Competency Application) Understand how a processor is controlled. Given a datapath and an instruction set be able to write the finite state machine steps in a high-level meta language.
• (Competency Knowledge) Understand and be able to explain (at a high level) hardware modifications required to implement an interrupt system and to understand the basic concepts required to write an interrupt handler (in assembly language).
• (Competency Knowledge) Understand the basic principles of pipelining:
  • Pipelining registers
  • Potential performance improvements with pipelining
  • Pipelining Hazards: Structural, Data, and Control
• (Competency Knowledge) Understand basic concepts of processor scheduling: Process vs program, PCB, scheduling algorithms (Round Robin, Shortest Job First, First Come First Served, Priority, Multilevel Queues), types of scheduler (short, medium, and long term), and context switching.
• (Competency Comprehension) Given a set of processes with appropriate parameters show scheduling behavior under different scheduling algorithms.
• (Competency Application) Be able to calculate the proper size required for pipeline register and speedups with pipelining.
• (Competency Application) Be able to solve basic word problems involving Amdahl's Law.
• (Competency Knowledge) Be able to identify and explain how to avoid or minimize the effect of the different types of pipelining hazards.
• (Competency Knowledge) Understand the drivers of memory cache designs: Temporal locality, spatial locality, and working set. Be able to match the design with the motivator.
• (Competency Knowledge) Understand the basic operation of virtual memory and typical components: Page table, virtual pages, physical frames, TLB, page/frame offset, page replacement algorithms (LRU, Random, FCFS, Optimum). Be able to describe the basic operation and identify the necessary subsystems.
• (Competency Knowledge) Understand the basic design of typical caches including indexes, tags, dirty and valid bits as well as multi-word blocks, set-associative, and fully associative caches. Given selected design parameters (i.e. word size, memory available for data
• (Competency Knowledge) Understand basic concepts of parallel processing: UMA (SMP) vs NUMA configurations, multiprocessor cache coherency, network interconnection schemes, threads, mutex, condition variables.
• (Accomplishment Application) Be able to write multi-threaded programs using the pthreads package. An example would be a multithreaded producer-consumer application.
• (Competency Knowledge) Understand basic networking concepts: Ethernet (CSMA/CD), Token Ring, Payload vs. header and trailer, checksums, bandwidth, effective bandwidth, latency, MAC addresses, Network (IP) addresses, protocol stacks, TCP/IP, routing, hubs/repeaters, bridges, VLANS, routers.
• (Competency Knowledge) Understand fundamentals of I/O devices such as polling versus interrupts, memory-mapped I/O, device registers (data, control, and status), disk memory concepts (sectors, tracks, platters, cylinders, seek time, rotational latency), disk scheduling algorithms (FCFS, SSTF, scan, c-scan, look, c-look)
• (Accomplishment Synthesis) Write and debug medium-sized C programs that simulate various of the above subsystems (interrupt enabled processor, virtual memory, multi-threaded operating system schedulers, reliable transport layer protocol which will be examples of operating-system-like coding.

Homework assignments that are not programming implementations are excluded from this repository.

• Homework 02 - Getting Started with the LC-22
• Homework 04 - Random Message Generator

• Project 01 - Building the LC-22
• Project 02 - Interrupts
• Project 03 - Virtual Memory Simulation
• Project 04 - Process Scheduling Simulation
• Project 05 - Networking
• Project EC - Pipeline