Interested in FPGA, VLSI, RISC-V, Accelerator and Digital Circuits Design.
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Transformer-Accelerator-Based-on-FPGA
Transformer-Accelerator-Based-on-FPGA PublicYou can run it on pynq z1. The repository contains the relevant Verilog code, Vivado configuration and C code for sdk testing. The size of the systolic array can be changed, now it is 16X16.
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Image-Processing-IP-Design-for-Demosaic-on-FPGA
Image-Processing-IP-Design-for-Demosaic-on-FPGA PublicVerilog
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spi-slave
spi-slave PublicForked from nandland/spi-slave
SPI Slave for FPGA in Verilog and VHDL
Verilog
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ZCU102-Pynq-3.0
ZCU102-Pynq-3.0 PublicForked from Arr-Dee/ZCU102-Pynq-3.0
Fork from Kria-PYNQ repo. PYNQ support and examples for Kria SOMs, repurposed for ZCU102.
Jupyter Notebook
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zcu104_test_pl_ddr
zcu104_test_pl_ddr Publictest pl ddr;run in c ; self defined memory controller for pl ddr
SystemVerilog
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