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1. Transformer-Accelerator-Based-on-FPGA Transformer-Accelerator-Based-on-FPGA Public

   You can run it on pynq z1. The repository contains the relevant Verilog code, Vivado configuration and C code for sdk testing. The size of the systolic array can be changed, now it is 16X16.

   Verilog 86 6

2. ARMv3-ISA-based-pipelined-processor ARMv3-ISA-based-pipelined-processor Public

   Verilog 1

3. Image-Processing-IP-Design-for-Demosaic-on-FPGA Image-Processing-IP-Design-for-Demosaic-on-FPGA Public

   Verilog

4. spi-slave spi-slave Public

   Forked from nandland/spi-slave

   SPI Slave for FPGA in Verilog and VHDL

   Verilog

5. ZCU102-Pynq-3.0 ZCU102-Pynq-3.0 Public

   Forked from Arr-Dee/ZCU102-Pynq-3.0

   Fork from Kria-PYNQ repo. PYNQ support and examples for Kria SOMs, repurposed for ZCU102.

   Jupyter Notebook

6. zcu104_test_pl_ddr zcu104_test_pl_ddr Public

   test pl ddr；run in c ; self defined memory controller for pl ddr

   SystemVerilog