<?xml version="1.0" encoding="UTF-8"?>

<x86reference

xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"

xsi:noNamespaceSchemaLocation="x86reference.xsd">

<one-byte>

<pri_opcd value="00">

<entry direction="0" op_size="0" r="yes" lock="yes">

<syntax><mnem>ADD</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="01">

<entry direction="0" op_size="1" r="yes" lock="yes">

<syntax><mnem>ADD</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="02">

<entry direction="1" op_size="0" r="yes">

<syntax><mnem>ADD</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="03">

<entry direction="1" op_size="1" r="yes">

<syntax><mnem>ADD</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="04">

<entry op_size="0" attr="acc">

<syntax>

<mnem>ADD</mnem>

<dst nr="0" group="gen" type="b">AL</dst>

<src><a>I</a><t>b</t></src>

</syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="05">

<entry op_size="1" attr="acc">

<syntax><mnem>ADD</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="06">

<entry>

<syntax>

<mnem>PUSH</mnem>

<dst address="SC" displayed="no">SS:[rSP]</dst> <!-- 1.02 -->

<src nr="0" group="seg" type="w" address="S2">ES</src>

</syntax>

<grp1>gen</grp1><grp2>stack</grp2><grp2>segreg</grp2>

<note><brief>Push Word, Doubleword or Quadword Onto the Stack</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="07">

<entry>

<syntax>

<mnem>POP</mnem>

<dst nr="0" group="seg" type="w" address="S2" depend="no">ES</dst>

<src address="SC" displayed="no">SS:[rSP]</src> <!-- 1.02 -->

</syntax>

<grp1>gen</grp1><grp2>stack</grp2><grp2>segreg</grp2>

<note><brief>Pop a Value from the Stack</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="08">

<entry direction="0" op_size="0" r="yes" lock="yes">

<syntax><mnem>OR</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Inclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="09">

<entry direction="0" op_size="1" r="yes" lock="yes">

<syntax><mnem>OR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Inclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="0A">

<entry direction="1" op_size="0" r="yes">

<syntax><mnem>OR</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Inclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="0B">

<entry direction="1" op_size="1" r="yes">

<syntax><mnem>OR</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Inclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="0C">

<entry op_size="0" attr="acc">

<syntax><mnem>OR</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Inclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="0D">

<entry op_size="1" attr="acc">

<syntax><mnem>OR</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Inclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="0E">

<entry>

<syntax>

<mnem>PUSH</mnem>

<dst address="SC" displayed="no">SS:[rSP]</dst> <!-- 1.02 -->

<src nr="1" group="seg" type="w" address="S2">CS</src>

</syntax>

<grp1>gen</grp1><grp2>stack</grp2><grp2>segreg</grp2>

<note><brief>Push Word, Doubleword or Quadword Onto the Stack</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="0F">

<entry doc1632_ref="gen_note_opcd_POP_CS_0F">

<proc_start post="no">00</proc_start>

<proc_end>00</proc_end>

<syntax>

<mnem>POP</mnem>

<dst nr="1" group="seg" type="w" address="S2">CS</dst>

<src address="SC" displayed="no">SS:[rSP]</src> <!-- 1.02 -->

</syntax>

<grp1>gen</grp1><grp2>stack</grp2><grp2>segreg</grp2>

<note><brief>Pop a Value from the Stack</brief></note>

</entry>

<entry attr="invd">

<proc_start post="no">01</proc_start>

<proc_end>01</proc_end>

<syntax/>

</entry>

<entry ref="two-byte">

<proc_start>02</proc_start>

<syntax/>

</entry>

</pri_opcd>

<pri_opcd value="10">

<entry direction="0" op_size="0" r="yes" lock="yes">

<syntax><mnem>ADC</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add with Carry</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="11">

<entry direction="0" op_size="1" r="yes" lock="yes">

<syntax><mnem>ADC</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add with Carry</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="12">

<entry direction="1" op_size="0" r="yes">

<syntax><mnem>ADC</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add with Carry</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="13">

<entry direction="1" op_size="1" r="yes">

<syntax><mnem>ADC</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add with Carry</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="14">

<entry op_size="0" attr="acc">

<syntax><mnem>ADC</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add with Carry</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="15">

<entry op_size="1" attr="acc">

<syntax><mnem>ADC</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Add with Carry</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="16">

<entry>

<syntax>

<mnem>PUSH</mnem>

<dst address="SC" displayed="no">SS:[rSP]</dst> <!-- 1.02 -->

<src nr="2" group="seg" type="w" address="S2">SS</src>

</syntax>

<grp1>gen</grp1><grp2>stack</grp2><grp2>segreg</grp2>

<note><brief>Push Word, Doubleword or Quadword Onto the Stack</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="17">

<entry attr="delaysint">

<syntax>

<mnem>POP</mnem>

<dst nr="2" group="seg" type="w" address="S2" depend="no">SS</dst>

<src address="SC" displayed="no">SS:[rSP]</src> <!-- 1.02 -->

</syntax>

<grp1>gen</grp1><grp2>stack</grp2><grp2>segreg</grp2>

<note><brief>Pop a Value from the Stack</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="18">

<entry direction="0" op_size="0" r="yes" lock="yes">

<syntax><mnem>SBB</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Integer Subtraction with Borrow</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="19">

<entry direction="0" op_size="1" r="yes" lock="yes">

<syntax><mnem>SBB</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Integer Subtraction with Borrow</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="1A">

<entry direction="1" op_size="0" r="yes">

<syntax><mnem>SBB</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Integer Subtraction with Borrow</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="1B">

<entry direction="1" op_size="1" r="yes">

<syntax><mnem>SBB</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Integer Subtraction with Borrow</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="1C">

<entry op_size="0" attr="acc">

<syntax><mnem>SBB</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Integer Subtraction with Borrow</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="1D">

<entry op_size="1" attr="acc">

<syntax><mnem>SBB</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<test_f>c</test_f><modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Integer Subtraction with Borrow</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="1E">

<entry>

<syntax>

<mnem>PUSH</mnem>

<dst address="SC" displayed="no">SS:[rSP]</dst> <!-- 1.02 -->

<src nr="3" group="seg" type="w" address="S2">DS</src>

</syntax>

<grp1>gen</grp1><grp2>stack</grp2><grp2>segreg</grp2>

<note><brief>Push Word, Doubleword or Quadword Onto the Stack</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="1F">

<entry>

<syntax>

<mnem>POP</mnem>

<dst nr="3" group="seg" type="w" address="S2" depend="no">DS</dst>

<src address="SC" displayed="no">SS:[rSP]</src> <!-- 1.02 -->

</syntax>

<grp1>gen</grp1><grp2>stack</grp2><grp2>segreg</grp2>

<note><brief>Pop a Value from the Stack</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="20">

<entry direction="0" op_size="0" r="yes" lock="yes">

<syntax><mnem>AND</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical AND</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="21">

<entry direction="0" op_size="1" r="yes" lock="yes">

<syntax><mnem>AND</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical AND</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="22">

<entry direction="1" op_size="0" r="yes">

<syntax><mnem>AND</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical AND</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="23">

<entry direction="1" op_size="1" r="yes">

<syntax><mnem>AND</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical AND</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="24">

<entry op_size="0" attr="acc">

<syntax><mnem>AND</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical AND</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="25">

<entry op_size="1" attr="acc">

<syntax><mnem>AND</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical AND</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="26">

<entry>

<syntax>

<mnem>ES</mnem>

<src nr="0" group="seg" type="w" displayed="no">ES</src>

</syntax>

<grp1>prefix</grp1><grp2>segreg</grp2>

<note><brief>ES segment override prefix</brief></note>

</entry>

<entry attr="undef">

<proc_start post="no">10</proc_start>

<proc_end>10</proc_end>

<syntax/>

<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>

<note><brief>(use with any branch instruction is reserved)</brief></note>

</entry>

<entry attr="null" mode="e">

<proc_start>10</proc_start>

<syntax/>

<grp1>prefix</grp1><grp2>segreg</grp2>

<note><brief>Null Prefix in 64-bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="27">

<entry>

<syntax>

<mnem>DAA</mnem>

<dst nr="0" group="gen" type="b" displayed="no">AL</dst>

</syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>

<test_f>ac</test_f><modif_f>oszapc</modif_f><def_f>szapc</def_f><undef_f>o</undef_f>

<note><brief>Decimal Adjust AL after Addition</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="28">

<entry direction="0" op_size="0" r="yes" lock="yes">

<syntax><mnem>SUB</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Subtract</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="29">

<entry direction="0" op_size="1" r="yes" lock="yes">

<syntax><mnem>SUB</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Subtract</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="2A">

<entry direction="1" op_size="0" r="yes">

<syntax><mnem>SUB</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Subtract</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="2B">

<entry direction="1" op_size="1" r="yes">

<syntax><mnem>SUB</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Subtract</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="2C">

<entry op_size="0" attr="acc">

<syntax><mnem>SUB</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Subtract</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="2D">

<entry op_size="1" attr="acc">

<syntax><mnem>SUB</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Subtract</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="2E">

<entry>

<syntax>

<mnem>CS</mnem>

<src nr="1" group="seg" type="w" displayed="no">CS</src>

</syntax>

<grp1>prefix</grp1><grp2>segreg</grp2>

<note><brief>CS segment override prefix</brief></note>

</entry>

<entry doc1632_ref="gen_note_branch_prefixes">

<proc_start post="no">10</proc_start>

<proc_end>10</proc_end>

<syntax><mnem sug="yes">NTAKEN</mnem></syntax>

<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>

<note><brief>Branch not taken prefix (only with Jcc instructions)</brief></note>

</entry>

<entry attr="null" mode="e">

<proc_start>10</proc_start>

<syntax/>

<grp1>prefix</grp1><grp2>segreg</grp2>

<note><brief>Null Prefix in 64-bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="2F">

<entry>

<syntax>

<mnem>DAS</mnem>

<dst nr="0" group="gen" type="b" displayed="no">AL</dst>

</syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>

<test_f>ac</test_f><modif_f>oszapc</modif_f><def_f>szapc</def_f><undef_f>o</undef_f>

<note><brief>Decimal Adjust AL after Subtraction</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="30">

<entry direction="0" op_size="0" r="yes" lock="yes">

<syntax><mnem>XOR</mnem><dst><a>E</a><t>b</t></dst><src><a>G</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Exclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="31">

<entry direction="0" op_size="1" r="yes" lock="yes">

<syntax><mnem>XOR</mnem><dst><a>E</a><t>vqp</t></dst><src><a>G</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Exclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="32">

<entry direction="1" op_size="0" r="yes">

<syntax><mnem>XOR</mnem><dst><a>G</a><t>b</t></dst><src><a>E</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Exclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="33">

<entry direction="1" op_size="1" r="yes">

<syntax><mnem>XOR</mnem><dst><a>G</a><t>vqp</t></dst><src><a>E</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Exclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="34">

<entry op_size="0" attr="acc">

<syntax><mnem>XOR</mnem><dst nr="0" group="gen" type="b">AL</dst><src><a>I</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Exclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="35">

<entry op_size="1" attr="acc">

<syntax><mnem>XOR</mnem><dst nr="0" group="gen" type="vqp">rAX</dst><src><a>I</a><t>vds</t></src></syntax>

<grp1>gen</grp1><grp2>logical</grp2>

<modif_f>oszapc</modif_f><def_f>oszpc</def_f><undef_f>a</undef_f><f_vals>oc</f_vals>

<note><brief>Logical Exclusive OR</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="36">

<entry>

<syntax>

<mnem>SS</mnem>

<src nr="2" group="seg" type="w" displayed="no">SS</src>

</syntax>

<grp1>prefix</grp1><grp2>segreg</grp2>

<note><brief>SS segment override prefix</brief></note>

</entry>

<entry attr="undef">

<proc_start post="no">10</proc_start>

<proc_end>10</proc_end>

<syntax/>

<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>

<note><brief>(use with any branch instruction is reserved)</brief></note>

</entry>

<entry attr="null" mode="e">

<proc_start>10</proc_start>

<syntax/>

<grp1>prefix</grp1><grp2>segreg</grp2>

<note><brief>Null Prefix in 64-bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="37">

<entry>

<syntax>

<mnem>AAA</mnem>

<dst nr="0" group="gen" type="b" displayed="no">AL</dst>

<dst nr="4" group="gen" type="b" displayed="no">AH</dst>

</syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>

<test_f>a</test_f><modif_f>oszapc</modif_f><def_f>ac</def_f><undef_f>oszp</undef_f>

<note><brief>ASCII Adjust After Addition</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="38">

<entry direction="0" op_size="0" r="yes">

<syntax><mnem>CMP</mnem><src><a>E</a><t>b</t></src><src><a>G</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Compare Two Operands</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="39">

<entry direction="0" op_size="1" r="yes">

<syntax><mnem>CMP</mnem><src><a>E</a><t>vqp</t></src><src><a>G</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Compare Two Operands</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="3A">

<entry direction="1" op_size="0" r="yes">

<syntax><mnem>CMP</mnem><src><a>G</a><t>b</t></src><src><a>E</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Compare Two Operands</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="3B">

<entry direction="1" op_size="1" r="yes">

<syntax><mnem>CMP</mnem><src><a>G</a><t>vqp</t></src><src><a>E</a><t>vqp</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Compare Two Operands</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="3C">

<entry op_size="0" attr="acc">

<syntax><mnem>CMP</mnem><src nr="0" group="gen" type="b">AL</src><src><a>I</a><t>b</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Compare Two Operands</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="3D">

<entry op_size="1" attr="acc">

<syntax><mnem>CMP</mnem><src nr="0" group="gen" type="vqp">rAX</src><src><a>I</a><t>vds</t></src></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszapc</modif_f><def_f>oszapc</def_f>

<note><brief>Compare Two Operands</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="3E">

<entry>

<syntax>

<mnem>DS</mnem>

<src nr="3" group="seg" type="w" displayed="no">DS</src>

</syntax>

<grp1>prefix</grp1><grp2>segreg</grp2>

<note><brief>DS segment override prefix</brief></note>

</entry>

<entry doc1632_ref="gen_note_branch_prefixes">

<proc_start post="no">10</proc_start>

<proc_end>10</proc_end>

<syntax><mnem sug="yes">TAKEN</mnem></syntax>

<grp1>prefix</grp1><grp2>branch</grp2><grp3>cond</grp3>

<note><brief>Branch taken prefix (only with Jcc instructions)</brief></note>

</entry>

<entry attr="null" mode="e">

<proc_start>10</proc_start>

<syntax/>

<grp1>prefix</grp1><grp2>segreg</grp2>

<note><brief>Null Prefix in 64-bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="3F">

<entry>

<syntax>

<mnem>AAS</mnem>

<dst nr="0" group="gen" type="b" displayed="no">AL</dst>

<dst nr="4" group="gen" type="b" displayed="no">AH</dst>

</syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>decimal</grp3>

<test_f>a</test_f><modif_f>oszapc</modif_f><def_f>ac</def_f><undef_f>oszp</undef_f>

<note><brief>ASCII Adjust AL After Subtraction</brief></note>

</entry>

<entry attr="invd" mode="e">

<proc_start>10</proc_start>

<syntax/>

<note><brief>Invalid Instruction in 64-Bit Mode</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="40">

<entry>

<syntax><mnem>INC</mnem><dst><a>Z</a><t>v</t></dst></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszap</modif_f><def_f>oszap</def_f>

<note><brief>Increment by 1</brief></note>

</entry>

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>Access to new 8-bit registers</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="41">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.B</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>Extension of r/m field, base field, or opcode reg field</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="42">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.X</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>Extension of SIB index field</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="43">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.XB</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.X and REX.B combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="44">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.R</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>Extension of ModR/M reg field</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="45">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.RB</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.R and REX.B combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="46">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.RX</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.R and REX.X combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="47">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.RXB</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.R, REX.X and REX.B combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="48">

<entry>

<syntax><mnem>DEC</mnem><dst><a>Z</a><t>v</t></dst></syntax>

<grp1>gen</grp1><grp2>arith</grp2><grp3>binary</grp3>

<modif_f>oszap</modif_f><def_f>oszap</def_f>

<note><brief>Decrement by 1</brief></note>

</entry>

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.W</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>64 Bit Operand Size</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="49">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.WB</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.W and REX.B combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="4A">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.WX</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.W and REX.X combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="4B">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.WXB</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.W, REX.X and REX.B combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="4C">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.WR</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.W and REX.R combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="4D">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.WRB</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.W, REX.R and REX.B combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="4E">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.WRX</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.W, REX.R and REX.X combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="4F">

<entry mode="e">

<proc_start>10</proc_start>

<syntax><mnem>REX.WRXB</mnem></syntax>

<grp1>prefix</grp1>

<note><brief>REX.W, REX.R, REX.X and REX.B combination</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="50">

<entry>

<syntax>

<mnem>PUSH</mnem>

<dst address="SC" displayed="no">SS:[rSP]</dst> <!-- 1.02 -->

<src><a>Z</a><t>v</t></src>

</syntax>

<grp1>gen</grp1><grp2>stack</grp2>

<note><brief>Push Word, Doubleword or Quadword Onto the Stack</brief></note>

</entry>

<entry mode="e">

<proc_start>10</proc_start>

<syntax>

<mnem>PUSH</mnem>

<dst address="SC" displayed="no">SS:[rSP]</dst> <!-- 1.02 -->

<src><a>Z</a><t>vq</t></src>

</syntax>

<grp1>gen</grp1><grp2>stack</grp2>

<note><brief>Push Word, Doubleword or Quadword Onto the Stack</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="58">

<entry>

<syntax>

<mnem>POP</mnem>

<dst depend="no"><a>Z</a><t>v</t></dst>

<src address="SC" displayed="no">SS:[rSP]</src> <!-- 1.02 -->

</syntax>

<grp1>gen</grp1><grp2>stack</grp2>

<note><brief>Pop a Value from the Stack</brief></note>

</entry>

<entry mode="e">

<proc_start>10</proc_start>

<syntax>

<mnem>POP</mnem>

<dst depend="no"><a>Z</a><t>vq</t></dst>

<src address="SC" displayed="no">SS:[rSP]</src> <!-- 1.02 -->

</syntax>

<grp1>gen</grp1><grp2>stack</grp2>

<note><brief>Pop a Value from the Stack</brief></note>

</entry>

</pri_opcd>

<pri_opcd value="60">

<entry>

<proc_start>01</proc_start>

<syntax>

<mnem>PUSHA</mnem>

<!-- 1.02

<src nr="0" group="gen" type="w" displayed="no">AX</src>

<src nr="1" group="gen" type="w" displayed="no">CX</src>

<src nr="2" group="gen" type="w" displayed="no">DX</src>

<src nr="3" group="gen" type="w" displayed="no">BX</src>

<src nr="4" group="gen" type="w" displayed="no">SP</src>

<src nr="5" group="gen" type="w" displayed="no">BP</src>

<src nr="6" group="gen" type="w" displayed="no">SI</src>

<src nr="7" group="gen" type="w" displayed="no">DI</src>

-->

<dst address="SC" displayed="no">SS:[rSP]</dst> <!-- 1.02 -->

<src nr="0" group="gen" type="wo" displayed="no">AX</src>

<src nr="1" group="gen" type="wo" displayed="no">CX</src>

<src nr="2" group="gen" type="wo" displayed="no">DX</src>

<src nr="3" group="gen" type="wo" displayed="no">BX</src>

<src nr="4" group="gen" type="wo" displayed="no">SP</src>

<src nr="5" group="gen" type="wo" displayed="no">BP</src>

<src nr="6" group="gen" type="wo" displayed="no">SI</src>

<src nr="7" group="gen" type="wo" displayed="no">DI</src>

</syntax>

<grp1>gen</grp1><grp2>stack</grp2>

<note><brief>Push All General-Purpose Registers</brief></note>

</entry>

<entry>

<proc_start>03</proc_start>

<!-- duplicated syntax removed in 1.02

<syntax>

<mnem>PUSHA</mnem>

<src nr="0" group="gen" type="w" displayed="no">AX</src>

<src nr="1" group="gen" type="w" displayed="no">CX</src>

<src nr="2" group="gen" type="w" displayed="no">DX</src>

<src nr="3" group="gen" type="w" displayed="no">BX</src>

<src nr="4" group="gen" type="w" displayed="no">SP</src>

<src nr="5" group="gen" type="w" displayed="no">BP</src>

<src nr="6" group="gen" type="w" displayed="no">SI</src>

<src nr="7" group="gen" type="w" displayed="no">DI</src>

</syntax>

-->

<syntax>

<mnem>PUSHAD</mnem>

<!-- 1.02

<src nr="0" group="gen" type="d" displayed="no">EAX</src>

<src nr="1" group="gen" type="d" displayed="no">ECX</src>