Paper 2023/935

Stealthy Logic Misuse for Power Analysis Attacks in Multi-Tenant FPGAs (Extended Version)

Vincent Meyers, Karlsruhe Institute of Technology (KIT)
Dennis R. E. Gnad, Karlsruhe Institute of Technology (KIT)
Nguyen Minh Dang, Karlsruhe Institute of Technology (KIT)
Falk Schellenberg, Max Planck Institute for Security and Privacy (MPI-SP)
Amir Moradi, Ruhr University Bochum
Mehdi B. Tahoori, Karlsruhe Institute of Technology (KIT)
Abstract

FPGAs have been used in the cloud since several years, as accelerators for various workloads such as machine learning, database processes and security tasks. As for other cloud services, a highly desired feature is virtualization in which multiple tenants can share a single FPGA to increase utilization and by that efficiency. By solely using standard FPGA logic in the untrusted tenant, on-chip logic sensors allow remote power analysis side-channel and covert channel attacks on the victim tenant. However, such sensors are implemented by unusual circuit constructions, such as ring oscillators, delay lines, or unusual interconnect configuration, which might be easily detected by bitstream and/or netlist checking. In this paper, we show that such structural checking methods are not universal solutions as the attacks can make use of any normal circuits, which mean they are ``benign-looking'' to any checking method. We indeed demonstrate that -- without any additional and suspicious implementation constraints -- standard circuits intended for legitimate tasks can be misused as a sensor thereby monitoring instantaneous power consumption, and hence conducting key-recovery attacks. This extremely stealthy attack is a threat that can originate from the application layers, i.e. through various high-level synthesis approaches.

Note: Extended version with more details and added results on the C6288 circuit.

Metadata
Available format(s)
PDF
Category
Implementation
Publication info
Published elsewhere. Design, Automation & Test in Europe Conference & Exhibition (DATE)
DOI
10.23919/DATE51398.2021.9473938
Keywords
fpgaon-chip sensorspower analysis attackmultitenancy
Contact author(s)
vincent meyers @ kit edu
dennis gnad @ kit edu
minh dang @ alumni kit edu
falk schellenberg @ mpi-sp org
amir moradi @ rub de
mehdi tahoori @ kit edu
History
2023-06-19: approved
2023-06-15: received
See all versions
Short URL
https://ia.cr/2023/935
License
Creative Commons Attribution
CC BY

BibTeX

@misc{cryptoeprint:2023/935,
      author = {Vincent Meyers and Dennis R. E. Gnad and Nguyen Minh Dang and Falk Schellenberg and Amir Moradi and Mehdi B. Tahoori},
      title = {Stealthy Logic Misuse for Power Analysis Attacks in Multi-Tenant {FPGAs} (Extended Version)},
      howpublished = {Cryptology {ePrint} Archive, Paper 2023/935},
      year = {2023},
      doi = {10.23919/DATE51398.2021.9473938},
      url = {https://eprint.iacr.org/2023/935}
}
Note: In order to protect the privacy of readers, eprint.iacr.org does not use cookies or embedded third party content.