MCST

MCST
Company type	Joint-stock company
Industry	Microprocessors
Founded	1992; 32 years ago
Founder	Boris Babayan
Headquarters	Moscow, Russia
Revenue	$25 million (2017)
Operating income	$1.34 million (2017)
Net income	$911,252 (2017)
Total assets	$54 million (2017)
Total equity	$6.15 million (2017)
Website	www.mcst.ru

MCST (Russian: МЦСТ, acronym for Moscow Center of SPARC Technologies) is a Russian microprocessor company that was set up in 1992.^[2] Different types of processors made by MCST were used in personal computers, servers and computing systems. MCST develops microprocessors based on two different instruction set architecture (ISA): Elbrus and SPARC. MCST is a direct descendant of the Lebedev Institute of Precision Mechanics and Computer Engineering.^[3]

8-core microprocessor Elbrus-8SV

MCST is the base organization of the Department of Informatics and Computer Engineering of the Moscow Institute of Physics and Technology.^[4]

MCST develops the Elbrus processor architecture and the eponymous family of universal VLIW microprocessors based on it with the participation of INEUM [ru]. The name "Elbrus" has been given the backronym "ExpLicit Basic Resources Utilization Scheduling".^[5]

In June 2024, the "Elbrus-2S3"^[6] has resurfaced on the Russian market. This is a nona-core("CPU-core×2" "3D・GPU-core×1" "2D・GPU-core×2" "VPU-core×4") CPU^[7] manufactured with a 16nm process. This is the cut down version of the 16-core Elbrus-16S, which might also resurface at some point if there's enough market demand for this to make sense.^[8]^[9]

Products

Elbrus 1 (1973) was the fourth generation Soviet computer, developed by Vsevolod Burtsev. Implements tag-based architecture and ALGOL as system language like the Burroughs large systems. A side development was an update of the 1965 BESM-6 as Elbrus-1K2.
Elbrus 2 (1977) was a 10-processor computer, considered the first Soviet supercomputer, with superscalar RISC processors. Re-implementation of the Elbrus 1 architecture with faster ECL chips.
Elbrus 3 (1986) was a 16-processor computer developed by Boris Babayan. Differing completely from the architecture of both Elbrus 1 and Elbrus 2, it employed a VLIW architecture.
Elbrus-90micro (1998–2010) is a computer line based on SPARC instruction set architecture (ISA) microprocessors: MCST R80, R150, R500, R500S, MCST-4R (MCST-R1000) and MCST-R2000 working at 80, 150, 500, 1000 and 2000 MHz.
Elbrus-3M1 (2005) is a two-processor computer based on the Elbrus 2000 microprocessor employing VLIW architecture working at 300 MHz. It is a further development of the Elbrus 3 (1986).
Elbrus МВ3S1/C (2009) is a ccNUMA 4-processor computer based on Elbrus-S microprocessor working at 500 MHz.
Elbrus-2S (2011) is a dual-core Elbrus 2000 based microprocessor working at 500 MHz, with capacity to calculate 16 GFlops.
Elbrus-2SM (2014) is a dual-core Elbrus 2000 based microprocessor working at 300 MHz, with capacity to calculate 9.6 GFlops.
Elbrus-4S (2014) is a quad-core Elbrus 2000 based microprocessor working at 800 MHz, with capacity to calculate 50 GFlops.
Elbrus-8S (2014–2015) is an octa-core Elbrus 2000 based microprocessor working at 1300 MHz, with capacity to calculate 250 GFlops.
Elbrus-8SV (2018) is an octa-core Elbrus 2000 based microprocessor working at 1500 MHz, with capacity to calculate 576 GFlops.
Elbrus-16S (2021) is 16-core Elbrus 2000 based microprocessor working at 2000 MHz, with capacity to calculate 750 GFlops at double precision and 1.5 TFlops at single precision operations.
Elbrus-32S (Sample production is planned in 2025) is a 32-core Elbrus 2000 based microprocessor working at 2500 MHz, with capacity to calculate 1.5 TFlops.^[10]