Hector A. Gonzalez

Multi-core systems are required by digital signal processors (DSP) to support the revolutionary Multiple-Input Multiple-Output (MIMO) imaging radars in the automotive industry. Such multi-core processors for Frequency Modulated Continuous Wave (FMCW) radars require the use of low-footprint accelerators that would reduce the overhead as the system scales up with the antenna density. In this paper, we propose an FFT accelerator, named RbFFT, optimized for the MIMO radar processing chain. The… Mehr anzeigen

Multi-core systems are required by digital signal processors (DSP) to support the revolutionary Multiple-Input Multiple-Output (MIMO) imaging radars in the automotive industry. Such multi-core processors for Frequency Modulated Continuous Wave (FMCW) radars require the use of low-footprint accelerators that would reduce the overhead as the system scales up with the antenna density. In this paper, we propose an FFT accelerator, named RbFFT, optimized for the MIMO radar processing chain. The architecture of RbFFT reduces the overhead by re-using existing memory in the processing element (PE), and employs a dual-radix butterfly engine with mixed bit resolution to optimize resources in dense radars. RbFFT reduces area by implementing for the first time ultra-low compression in its dual twiddle factor ROM. RbFFT also innovates with custom fetching and buffering strategies to improve memory-based FFTs while reusing logic to integrate reverse bit ordering, windowing and inverse FFT (IFFT) within the same accelerator passes. The proposed accelerator is implemented in a 25-Core Smart MPSoC in 22FDX using Adaptive Body Biasing (ABB) at 0.6V. Besides RbFFT being pioneer in specialized FFT accelerators for dense MIMO systems, the results also show state-of-the-art improvements via 11% reduction in the normalized energy consumption, 4% reduction in latency, and 11 times area reduction with relation to previous silicon implementations. Weniger anzeigen

Various aspects of the invention provide a method for dynamically resolving the speed ambiguity of a target in a radar system, the method including a novel detection approach in an heterogeneous frame configuration

As humans advance toward a higher level of artificial intelligence, it is always at the cost of escalating computational resource consumption, which requires developing novel solutions to meet the exponential growth of AI computing demand. Neuromorphic hardware takes inspiration from how the brain processes information and promises energy-efficient computing of AI workloads. Despite its potential, neuromorphic hardware has not found its way into commercial AI data centers. In this article, we… Mehr anzeigen

As humans advance toward a higher level of artificial intelligence, it is always at the cost of escalating computational resource consumption, which requires developing novel solutions to meet the exponential growth of AI computing demand. Neuromorphic hardware takes inspiration from how the brain processes information and promises energy-efficient computing of AI workloads. Despite its potential, neuromorphic hardware has not found its way into commercial AI data centers. In this article, we try to analyze the underlying reasons for this and derive requirements and guidelines to promote neuromorphic systems for efficient and sustainable cloud computing: We first review currently available neuromorphic hardware systems and collect examples where neuromorphic solutions excel conventional AI processing on CPUs and GPUs. Next, we identify applications, models and algorithms which are commonly deployed in AI data centers as further directions for neuromorphic algorithms research. Last, we derive requirements and best practices for the hardware and software integration of neuromorphic systems into data centers. With this article, we hope to increase awareness of the challenges of integrating neuromorphic hardware into data centers and to guide the community to enable sustainable and energy-efficient AI at scale. Weniger anzeigen

The joint progress of artificial neural networks (ANNs) and domain specific hardware accelerators such as GPUs and TPUs took over many domains of machine learning research. This development is accompanied by a rapid growth of the required computational demands for larger models and more data. Concurrently, emerging properties of foundation models such as in-context learning drive new opportunities for machine learning applications. However, the computational cost of such applications is a… Mehr anzeigen

The joint progress of artificial neural networks (ANNs) and domain specific hardware accelerators such as GPUs and TPUs took over many domains of machine learning research. This development is accompanied by a rapid growth of the required computational demands for larger models and more data. Concurrently, emerging properties of foundation models such as in-context learning drive new opportunities for machine learning applications. However, the computational cost of such applications is a limiting factor of the technology in data centers, and more importantly in mobile devices and edge systems. To mediate the energy footprint and non-trivial latency of contemporary systems, neuromorphic computing systems deeply integrate computational principles of neurobiological systems by leveraging low-power analog and digital technologies. SpiNNaker2 is a digital neuromorphic chip developed for scalable machine learning. The event-based and asynchronous design of SpiNNaker2 allows the composition of large-scale systems involving thousands of chips. This work features the operating principles of SpiNNaker2 systems, outlining the prototype of novel machine learning applications. These applications range from ANNs over bio-inspired spiking neural networks to generalized event-based neural networks. With the successful development and deployment of SpiNNaker2, we aim to facilitate the advancement of event-based and asynchronous algorithms for future generations of machine learning systems. Weniger anzeigen

Radars are commonly used in automotive applications to provide information on a target’s location and velocity simultaneously. The multiple-input and multiple-output technology has been applied to improve spatial awareness, but impacts the Doppler sampling rate and causes velocity ambiguity. An incorrect velocity indication can pose significant safety risks in the automotive industry. To address this, we propose a complex-valued neural network to retrieve the actual velocity from aliased… Mehr anzeigen

Radars are commonly used in automotive applications to provide information on a target’s location and velocity simultaneously. The multiple-input and multiple-output technology has been applied to improve spatial awareness, but impacts the Doppler sampling rate and causes velocity ambiguity. An incorrect velocity indication can pose significant safety risks in the automotive industry. To address this, we propose a complex-valued neural network to retrieve the actual velocity from aliased Doppler response by parsing signal magnitudes and phases. On the artificial data, it achieves an accuracy of 99.3%, outperforming the conventional methods on the same data. Weniger anzeigen

Industry leaders in automotive radars are moving towards highly dense MIMO radars (i.e., 4D radars), as they provide robust detection at a high angular resolution. However, these systems come at the expense of highly parallel processing requirements, higher off- chip communication data rates, and higher power consumption as a result of denser arrays to process. To date, no work in the open literature addresses the low-power requirements in DSPs for such dense MIMO FMCW radars, their… Mehr anzeigen

Industry leaders in automotive radars are moving towards highly dense MIMO radars (i.e., 4D radars), as they provide robust detection at a high angular resolution. However, these systems come at the expense of highly parallel processing requirements, higher off- chip communication data rates, and higher power consumption as a result of denser arrays to process. To date, no work in the open literature addresses the low-power requirements in DSPs for such dense MIMO FMCW radars, their scalability, their highly parallel processing requirements, and on-chip Machine Learning (ML) in the context of those 4D (i.e., azimuth, elevation, Doppler, and range) radars, which are all crucial challenges to leverage their potential. We propose a 12-ADC multi-core DSP (RaDSP) in 22FDX GLOBALFOUNDRIES using Adaptive Body Biasing (ABB) at 0.6V to enable 5D (i.e., 4D plus the target class) MIMO radar processing with 25 processing elements (PEs) operating at a low clock frequency for a reduced average power consumption of only 52.6mW that is at least 90x lower than state-of-the-art commercial MIMO Radar DSPs. Weniger anzeigen

Frequency-modulated continuous wave radar sensors play an essential role for assisted and autonomous driving as they are robust under all weather and light conditions. However, the rising number of transmitters and receivers for obtaining a higher angular resolution increases the cost for digital signal processing. One promising approach for energy-efficient signal processing is the usage of brain-inspired spiking neural networks (SNNs) implemented on neuromorphic hardware. In this article we… Mehr anzeigen

Frequency-modulated continuous wave radar sensors play an essential role for assisted and autonomous driving as they are robust under all weather and light conditions. However, the rising number of transmitters and receivers for obtaining a higher angular resolution increases the cost for digital signal processing. One promising approach for energy-efficient signal processing is the usage of brain-inspired spiking neural networks (SNNs) implemented on neuromorphic hardware. In this article we perform a step-by-step analysis of automotive radar processing and argue how spiking neural networks could replace or complement the conventional processing. We provide SNN examples for two processing steps and evaluate their accuracy and computational efficiency. For radar target detection, an SNN with temporal coding is competitive to the conventional approach at a low compute overhead. Instead, our SNN for target classification achieves an accuracy close to a reference artificial neural network while requiring 200 times less operations. Finally, we discuss the specific requirements and challenges for SNN-based radar processing on neuromorphic hardware. This study proves the general applicability of SNNs for automotive radar processing and sustains the prospect of energy-efficient realizations in automated vehicles. Weniger anzeigen

After several decades of continuously optimizing computing systems, the Moore's law is reaching its end. However, there is an increasing demand for fast and efficient processing systems that can handle large streams of data while decreasing system footprints. Neuromorphic computing answers this need by creating decentralized architectures that communicate with binary events over time. Despite its rapid growth in the last few years, novel algorithms are needed that can leverage the potential of… Mehr anzeigen

After several decades of continuously optimizing computing systems, the Moore's law is reaching its end. However, there is an increasing demand for fast and efficient processing systems that can handle large streams of data while decreasing system footprints. Neuromorphic computing answers this need by creating decentralized architectures that communicate with binary events over time. Despite its rapid growth in the last few years, novel algorithms are needed that can leverage the potential of this emerging computing paradigm and can stimulate the design of advanced neuromorphic chips. In this work, we propose a time-based spiking neural network that is mathematically equivalent to the Fourier transform. We implemented the network in the neuromorphic chip Loihi and conducted experiments on five different real scenarios with an automotive frequency modulated continuous wave radar. Experimental results validate the algorithm, and we hope they prompt the design of ad hoc neuromorphic chips that can improve the efficiency of state-of-the-art digital signal processors and encourage research on neuromorphic computing for signal processing. Weniger anzeigen

Recent years have witnessed a growing interest in EEG-based wearable classifiers of emotions, which could enable the real-time monitoring of patients suffering from neurological disorders such as Amyotrophic Lateral Sclerosis (ALS), Autism Spectrum Disorder (ASD), or Alzheimer's. The hope is that such wearable emotion classifiers would facilitate the patients' social integration and lead to improved healthcare outcomes for them and their loved ones. Yet in spite of their direct relevance to… Mehr anzeigen

Recent years have witnessed a growing interest in EEG-based wearable classifiers of emotions, which could enable the real-time monitoring of patients suffering from neurological disorders such as Amyotrophic Lateral Sclerosis (ALS), Autism Spectrum Disorder (ASD), or Alzheimer's. The hope is that such wearable emotion classifiers would facilitate the patients' social integration and lead to improved healthcare outcomes for them and their loved ones. Yet in spite of their direct relevance to neuro-medicine, the hardware platforms for emotion classification have yet to fill up some important gaps in their various approaches to emotion classification in a healthcare context. In this paper, we present the first hardware-focused critical review of EEG-based wearable classifiers of emotions and survey their implementation perspectives, their algorithmic foundations, and their feature extraction methodologies. We further provide a neuroscience-based analysis of current hardware accelerators of emotion classifiers and use it to map out several research opportunities, including multi-modal hardware platforms, accelerators with tightly-coupled cores operating robustly in the near/supra-threshold region, and pre-processing libraries for universal EEG-based datasets. Weniger anzeigen

Multiple-Input Multiple-Output arrays in frequency modulated continuous wave (FMCW) radars provide the angular resolution required to isolate objects in complex automotive scenes. However, the demodulation of individual antenna contributions increases the chirp repetition interval, which reduces the maximum unambiguously measurable velocity. Objects moving faster than this velocity are then incorrectly folded in the range-Doppler maps, leading to critical inaccuracies in the advanced driver… Mehr anzeigen

Multiple-Input Multiple-Output arrays in frequency modulated continuous wave (FMCW) radars provide the angular resolution required to isolate objects in complex automotive scenes. However, the demodulation of individual antenna contributions increases the chirp repetition interval, which reduces the maximum unambiguously measurable velocity. Objects moving faster than this velocity are then incorrectly folded in the range-Doppler maps, leading to critical inaccuracies in the advanced driver assistance systems. In this paper we address this problem from the Binary Phase Modulation (BPM) perspective, which is a scheme particularly attractive due to its high signal-to-noise ratio, and whose intrinsic phase alterations prevent traditional disambiguation techniques from being reliable. We present a detailed analysis on the design, implementation, and validation of Doppler disambiguation techniques for BPM systems. The presented benchmark includes a variety of algorithms involving the Chinese Remainder Theorem (CRT), Density-Based Spatial Clustering of Applications with Noise (DBSCAN), Hypothetical Phase Compensation (HPC), and an intuitive range-based approach. The techniques are extensively validated using synthetic data generated with MATLAB, and real data collected with a 77-GHz FMCW radar. The results show the best set of trade-offs for the Enhanced DBSCAN (EDBSCAN) method in terms of robustness, computational overhead, velocity span, and disambiguation rate. Weniger anzeigen

The increasing density of Multiple-Input Multiple-Output (MIMO) arrays in imaging radars for the automotive industry demands highly parallel systems with low-footprint accelerators, which would enable the concurrent processing of a high number of virtual channels with a low-latency, and without a high area overhead. In this paper, we design, implement, and test multiple handcrafted compression schemes for Twiddle Factor(TF) Read-Only Memories (ROM), aiming to… Mehr anzeigen

The increasing density of Multiple-Input Multiple-Output (MIMO) arrays in imaging radars for the automotive industry demands highly parallel systems with low-footprint accelerators, which would enable the concurrent processing of a high number of virtual channels with a low-latency, and without a high area overhead. In this paper, we design, implement, and test multiple handcrafted compression schemes for Twiddle Factor(TF) Read-Only Memories (ROM), aiming to reduce the footprint of a variable-length and dual-radix Fast Fourier Transform(FFT) accelerator in a Multi-core Digital Signal Processor (DSP)for Frequency Modulated Continuous Wave (FMCW) radars. The compression schemes proposed in this paper involve double delta encoding, Radix-specific address optimizations per port, symmetry inclusion, and exploitation of the bit resolution changes within the radar processing chain. All schemes are verified in an FPGA in terms of logic utilization and quantization using a 77-GHz radar, and implemented in a RISCV-based Processing Element (PE) of a Multi-core DSP with an Adaptive Body Bias(ABB) approach in 22FDX technology for assessing area, leakage, and relative latency savings when compared with a dual-ROM equivalent in the state-of-the-art Weniger anzeigen

The Doppler disambiguation techniques in the Multiple-Input Multiple-Output state-of-the-art are usually benchmarked for simple modulation schemes such as Time Division Multiplexing (TDM). However, the functionality ensured in TDM does not necessarily extrapolate to other more complex modulation schemes such as Binary Phase Modulation (BPM), in which simultaneous phase codes are transmitted to increase the aperture size of the antenna array while keeping a higher signal-to-noise (SNR)… Mehr anzeigen

The Doppler disambiguation techniques in the Multiple-Input Multiple-Output state-of-the-art are usually benchmarked for simple modulation schemes such as Time Division Multiplexing (TDM). However, the functionality ensured in TDM does not necessarily extrapolate to other more complex modulation schemes such as Binary Phase Modulation (BPM), in which simultaneous phase codes are transmitted to increase the aperture size of the antenna array while keeping a higher signal-to-noise (SNR) ratio. One of the commonly applied Doppler disambiguation techniques for TDM, which is based on a hypothetical phase compensation (HPC) is presented in this paper through an extensive comparison between TDM and BPM. Our study describes its Doppler disambiguation dependency with the number of transmitters, and discloses vulnerabilities involved in applying the HPC technique to the two modulation schemes, by using synthetic scenarios generated with MATLAB, and real data collected with a 77 GHz frequency modulated continuous wave(FMCW) radar. Weniger anzeigen

The wearability of emotion classifiers is a must if they are to significantly improve the social integration of patients suffering from neurological disorders. Such wearability requires the use of low-power hardware accelerators that would enable near real-time classification and extended periods of operations. In this paper, we architect, design, implement, and test a handcrafted, hardware Convolutional Neural Network, named BioCNN, optimized for EEG-based emotion detection and other similar… Mehr anzeigen

The wearability of emotion classifiers is a must if they are to significantly improve the social integration of patients suffering from neurological disorders. Such wearability requires the use of low-power hardware accelerators that would enable near real-time classification and extended periods of operations. In this paper, we architect, design, implement, and test a handcrafted, hardware Convolutional Neural Network, named BioCNN, optimized for EEG-based emotion detection and other similar bio-medical applications. The architecture of BioCNN is based on aggressive pipelining and hardware parallelism that maximizes resource re-use and minimizes memory footprint. The FEXD and DEAP datasets are used to test the BioCNN prototype that is implemented using the Digilent Atlys Board with a low-cost Spartan-6 FPGA. The experimental results show that BioCNN has a competitive energy efficiency of 11GOps/W, a throughput of 1.65GOps that is in line with the real-time specification of a wearable device, and a latency of less than 1ms, which is much smaller than the 150ms required for human interaction times. Its emotion inference accuracy is competitive with the top software-based emotion detectors. Weniger anzeigen

We present a scalable architecture based on a trained filter bank for input pre-processing and a recurrent neural network (RNN) for the detection of atrial fibrillation in electrocardiogram (ECG) signals, with the focus on enabling a very efficient hardware implementation as application-specific integrated circuit (ASIC). Our already very efficient base architecture is further improved by replacing the RNN with a delta-encoded gated recurrent unit (GRU) and adding a confidence measure (CM) for… Mehr anzeigen

We present a scalable architecture based on a trained filter bank for input pre-processing and a recurrent neural network (RNN) for the detection of atrial fibrillation in electrocardiogram (ECG) signals, with the focus on enabling a very efficient hardware implementation as application-specific integrated circuit (ASIC). Our already very efficient base architecture is further improved by replacing the RNN with a delta-encoded gated recurrent unit (GRU) and adding a confidence measure (CM) for terminating the computation as early as possible. With these optimizations, we demonstrate a reduction of the processing load of 58 % on an internal dataset while still achieving near state-of-the-art classification results on the Physionet ECG dataset with only 1202 parameters. Weniger anzeigen

EEG-based emotion classifiers have the potential of significantly improving the social integration of patients suffering from neurological disorders such as Amyotrophic Lateral Sclerosis or the acute stages of Alzheimer’s disease. Emotion classifiers have historically used software on general-purpose computers and operating under off-line conditions. Yet the wearability of such classifiers is a must if they are to enable the socialization of critical-care patients. Such wearability requires the… Mehr anzeigen

EEG-based emotion classifiers have the potential of significantly improving the social integration of patients suffering from neurological disorders such as Amyotrophic Lateral Sclerosis or the acute stages of Alzheimer’s disease. Emotion classifiers have historically used software on general-purpose computers and operating under off-line conditions. Yet the wearability of such classifiers is a must if they are to enable the socialization of critical-care patients. Such wearability requires the use of low-power hardware accelerators that would enable near real-time classification and extended periods of operations. In this paper, we architect, design, implement, and test a handcrafted, hardware Convolutional Neural Network, named BioCNN, optimized for EEG-based emotion detection and other bio-medical applications. The EEG signals are generated using a low-cost, off-the-shelf device, namely, Emotiv Epoc , and then denoised and pre-processed ahead of their use by BioCNN. For training and testing, BioCNN uses three repositories of emotion classification datasets, including the publicly available DEAP and DREAMER datasets, along with an original dataset collected in-house from 5 healthy subjects using standard visual stimuli. A subject-specific training approach is used under TensorFlow to train BioCNN, which is implemented using the Digilent Atlys Board with a low-cost Spartan-6 FPGA. The experimental results show a competitive energy efficiency of 11 GOps/W, a throughput of 1.65 GOps that is in line with the real-time specification of a wearable device, and a latency of less than 1 ms, which is smaller than the 150 ms required for human interaction times. Its emotion inference accuracy is competitive with the top software-based emotion detectors. Weniger anzeigen

State-of-the-art FMCW automotive radar sensors contain Multiple-Input Multiple-Output (MIMO) arrays to obtain a good angular resolution. Binary phase modulation (BPM) is a technique used on these systems to achieve a high Signal-to-noise ratio (SNR), compared to the commonly used Time-division multiplexing (TDM). As several chirps are combined to transmit a binary code, the approach suffers from a reduced maximum unambiguous velocity. In this paper, we implement three approaches for the… Mehr anzeigen

State-of-the-art FMCW automotive radar sensors contain Multiple-Input Multiple-Output (MIMO) arrays to obtain a good angular resolution. Binary phase modulation (BPM) is a technique used on these systems to achieve a high Signal-to-noise ratio (SNR), compared to the commonly used Time-division multiplexing (TDM). As several chirps are combined to transmit a binary code, the approach suffers from a reduced maximum unambiguous velocity. In this paper, we implement three approaches for the velocity disambiguation in a MIMO radar with four transmitters using Hadamard coding. The first two approaches require three heterogeneous frames and are based on an exact method (Chinese Remainder Theorem), and an unsupervised learning technique (Density Based Spatial Clustering of Applications with Noise) respectively. The third approach determines the true velocity by searching for the strongest response in the angular spectrum of a single frame, which suffers from a negative bias caused by the phase codes. Weniger anzeigen

Emotion classification using EEG signal processing has the potential of significantly improving the social
integration of patients suffering from neurological disorders such as Amyotrophic Lateral Sclerosis (ALS) or the acute stages of Azlheimer’s disease. One important challenge to the implementation of high-fidelity emotion recognition systems is the inadequacy of EEG data in terms of Signal-to-noise
ratio (SNR), duration, and subject-to-subject variability. In this paper, we present a… Mehr anzeigen

Emotion classification using EEG signal processing has the potential of significantly improving the social
integration of patients suffering from neurological disorders such as Amyotrophic Lateral Sclerosis (ALS) or the acute stages of Azlheimer’s disease. One important challenge to the implementation of high-fidelity emotion recognition systems is the inadequacy of EEG data in terms of Signal-to-noise
ratio (SNR), duration, and subject-to-subject variability. In this paper, we present a novel, integrated framework for semi-generic emotion detection using (1) independent component analysis for EEG preprocessing, (2) EEG subject clustering by unsupervised learning, and (3) a convolutional neural network (CNN) for EEG-based emotion recognition. The training and testing data was built using the combination of two publicly available repositories (DEAP and DREAMER), and a local dataset collected at Khalifa University using the standard International Affective Picture System (IAPS). The CNN clas-
sifier with the proposed transfer learning approach achieves an average accuracy of 70.26% for valence and 72.42% for arousal, which are superior to the reported accuracies of all generic (subject-independent) emotion classifiers. Weniger anzeigen

Emotion classification using EEG signals has the potential of improving the social integration of patients suffering from neurological disorders such as Amyotrophic Lateral Sclerosis. The wearability of such classifiers requires the use of low-power hardware accelerators that would enable human-time interaction and extended operation periods. In this presentation, we describe the first hardware architecture of a neuromorphic processor for emotion classification using a pre-trained Convolutional… Mehr anzeigen

Emotion classification using EEG signals has the potential of improving the social integration of patients suffering from neurological disorders such as Amyotrophic Lateral Sclerosis. The wearability of such classifiers requires the use of low-power hardware accelerators that would enable human-time interaction and extended operation periods. In this presentation, we describe the first hardware architecture of a neuromorphic processor for emotion classification using a pre-trained Convolutional Neural Network that uses pre-processed EEG signals. The data is recorded with a low-cost, off-the-shelf-device, and the classifier trained with two well-known datasets using Google’s TensorFlow. The classifier hardware is tested using the Atlys board. Weniger anzeigen

The paper describes the implementation and design of a functional verification system based on the hardware acceleration technique known as Simulation Acceleration. Using only open source tools (Open Hardware and software) gives the possibility to small developers and researchers to have accessible tools to materialise their designs at a low cost, promoting the development of local industries. This system allows small companies to execute the verification of digital systems, executing their… Mehr anzeigen

The paper describes the implementation and design of a functional verification system based on the hardware acceleration technique known as Simulation Acceleration. Using only open source tools (Open Hardware and software) gives the possibility to small developers and researchers to have accessible tools to materialise their designs at a low cost, promoting the development of local industries. This system allows small companies to execute the verification of digital systems, executing their hardware description language designs directly into an emulating device and display its behaviour in a workstation controlled by the user or developer. The verification time, and the time to market of a complex digital design decreases with the use of hardware emulation verification. Weniger anzeigen