FPGA Accelerator for CNN using Vivado HLS
-
Updated
Oct 25, 2021 - C
#
sdsoc
Here are 13 public repositories matching this topic...
IIoT-SPYN gives users the ability to control, monitor, capture data, visualize and analyze industrial grade motors
-
Updated
Mar 19, 2020 - Tcl
-
Updated
Feb 26, 2020 - C
Source codes for High Level Synthesis for Fixed Progammable Gate Arrays (FPGAs). Can be converted to RTL using Vivado HLS or SDSoC.
-
Updated
Apr 5, 2019 - C
Visual System Integrator - Accelerate your embedded development
embedded
fpga
zynq
integration
hls
accelerator
cnn
rapid
accelerate
lenet
xilinx
vivado
sdx
rapid-development
mpsoc
fpga-accelerator
high-level-synthesis
sdsoc
virtex7
xilinx-zynq
-
Updated
Jun 18, 2018 - Python
xfOpenCV Optical Flow implemented on Zedboard with built aarch32 OpenCV libraries
opencv
arm
revision
webcam
optical-flow
cross-compile
zedboard
petalinux
webcam-capture
aarch32
sdsoc
webcamera
xfopencv
-
Updated
Jan 16, 2020 - C
deep-neural-networks
ai
fpga
deep-learning
dnn
artificial-intelligence
mnist
artificial-neural-networks
ann
sdsoc
-
Updated
Dec 15, 2017 - Objective-C
Projects for snickerdoodle black
-
Updated
Jun 9, 2024 - HTML
Improve this page
Add a description, image, and links to the sdsoc topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the sdsoc topic, visit your repo's landing page and select "manage topics."