Merge pull request #19 from dnorthcote/master

Add ZCU208

Update drivers with version number

Upgrade 2020 2 (#16)

* Upgrade block_design and bitstream to 2020.2

* Update make_bitstream

* Remove rfsoc-sam-ofdm project

* Update software package, remove rfsoc-sam-ofdm

* Remove inspector import library

* Fix dot on constants import

* Upgrade zcu111 to vivado_2020_2

* Fix readme for 2020.2

* Update README for Vivado 2020.2

* Add PLL_FREQUENCY constant to ZCU111 overlay

* Add PLL_FREQUENCY constant to RFSoC2x2 overlay

* Update notebooks

* Update readme

* Fix notebooks

* Remove freqplan

* Update version in driver

* Fix version to 0.4.1

* Slow down analyser

Update frequency planner to v0.2.0

Update banners for notebooks and readme

Add frequency planner installation instructions

Equal equal pynq 2.6

Update the Strathclyde banner and documentation (#8)

* Update strathclyde banner

* Fix figure typo in ZCU111 notebook

* Add build instructions in readme

* Update system version in readme

* Remove makefile print statements

* Improve readme make instructions

Upgrade to 2 GHz Analyser (#7)

* Added 2GHz Spectrum Analyser

* Added 2GHz support
* Still in development

* Added reprogrammable window

* Backup block_design.tcl

* Added flexible FFT size Support in Hardware

* Created Spectrum Analyser Library and merged IP Cores into SpectrumAnalyser_v1_0

* Merged aggregated software into one

IP Core now initialises automatically with bindto.

* Added bandwidth selector IP Core

Update spectrum analyser to allow for 8192 windows. Needs regenerated.

* Updated block design to support hierarchies

* Generated new spectrum analyser core with 8192 support

* Swapped out FIR Compiler for Vector FIR Compiler in the fine decimator

There seem to be issues with aliasing, so thought this might help.

* In Beta v1.0, added simple setup.py for quick installation.

* Deleted redundant IP and added some text to the notebook

* Temporary Readme

* Improved spectrogram frame rate by using PNGs

* Update clock programming

* New bitstream, hwh, and bwselector IP Core

* Fixed SSR Converter for improved decimation

* Update block_design.tcl

* Add new drivers

Improved decimation, interface, and adding widgets.

* Removed debug ports from Spectrum Analyser IP

* Removed dependancy on RF-DC clock by separating clock domains

Also updated block design with new spectrum analyser core

* Began code commenting and cleanup for version release

* Update README.md

* Update README.md

* Add makefile infrastructure

* Update block_design.tcl

* Ignore .jou

* Update .gitignore

* Update .gitignore

* Update .gitignore

* Update .gitignore

* Update .gitignore

* Commit before hardware change

* Added ZCU111, and tidied up the system

Improved clock conversion by using off-chip clock.

* Update setup.py

* Update setup.py

* Refactor assets

* Fixed a typo

* add assets package data to setup.py

* Combine hw_data_files and assets in setup.py

* Update setup.py

* Fixed overlay.py for image assets location

* Create demonstration.gif

* Update README.md

* Update demonstration.gif

* Update README.md

* Fixed a small typo

* Update make_bitstream.tcl

* Update make_project.tcl

* Fixed some name errors in the make files

* Added quad-channel ZCU111 release

* Fixed make file with bitstream_file command

* Update makefiles

* Notebooks to be included in pip package

* Update setup.py

* Update overlay.py

* Update overlay.py

* Fixed syntax error

* Update README.md

* Change notebook installation directory

* Changed notebook installation directory to 'strath-rfsoc/spectrum-analyser'

* Added intermediate notebooks for RFSoC2x2 build

* Add jupyter lab disclaimer

* Add short public notebook

* Add use Jupyter Labs message to notebook

* Missing /lab in notebook message

* Change radio frontend class names to GUI

* Added Widget Callback Que

* Added widget callback que to prevent properties from overwriting.
* Rearranged decimation factor programming method.
* Removed spectrogram quality widget

* Check for centre_frequency of 0...

Stops a crash when the user sets the centre_frequency to 0.

* Update setup.py

* Changed analyser to analyzer

* Create strath_banner.png

* Change analyser to analyzer

* Fixed logo... it went dark in previous commit

* Final change for analyser to analyzer closes #6

* Fixed resolution of demonstration.gif

* Add que system to transmitter GUI

* Removed authors from notebook

* Added new notebooks with improved descriptions

Closes #14
* rfsoc-sam overview image no longer transparent.
* analysis notebook now contains wifi example.
* voila notebook now contains how-to procedure.

* Remove author's from Spectrum Analyser

* Add AI for overview image

* Add further voila instructions to notebook

* Move transmitter tab into analyser tab Closes #7

* Added transmitter buttons #3

* Voila notebook should program clock

* Update analyser to analyzer in voila notebook

* Fixed spectrogram button issue

* Change size of wifi demonstration image in notebook

* Add safe adc tile restart, improve stability

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* Increase que timer to improve stability

* Stop using triple buffer and check for dma status

* Update software_apps with author info

* Added dma status property

* Update ZCU111 support

* Remove unnecessary images

* Give the user an initialisation time in Notebooks

* Update readme with installation instructions

* Analyzer to Analyzer in readme

* Add more detail to readme

* Add some lines under headings

Co-authored-by: lewis brown <[email protected]>
Co-authored-by: Lewis Davin McLaughlin <[email protected]>

Update README.md