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Achievement: QuickdrawAchievement: Pull SharkAchievement: Arctic Code Vault Contributor

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skwcrd/README.md

Hi there 👋 I'm Sukawit Charoendet

👨🏻💻 About Me

I am currently taking online courses about Artificial Intelligence (AI), And graduated Bachelor degree of Computer Engineering at the University of Phayao.

  • 👀 I'm interested in Artificial Intelligence and Robotics.
  • 🌱 I'm currently learning Full Stack and DevOps Development.
  • 💞️ I'm looking to collaborate on company working about Artificial Intelligence (AI), Internet of Thing (IoT) or Robotics.
  • 📫 How to reach me:

Github Linkedin

Tech Stack

  • 💻 Front-end
    • 📱 Mobile App Dev
      • Dart Flutter
      • Java
      • Kotlin
      • Swift
    • 🌐 Web Dev
      • HTML5
      • CSS3
      • React
  • 💻 Back-end
    • JavaScript
    • NodeJS ExpressJS
  • 💻 Other languages
    • C/C
    • Python
    • VHDL
  • 🛢 Database
    • Firebase
    • MySQL
    • MongoDB
  • ⚙️ Tool
    • Git
    • GitHub
    • GitLab
    • Docker
  • 🔧 IDE
    • Vim
    • Visual Studio Code
    • Android Studio
    • XCode

Github Stats

Sukawit's GitHub Stats Top Langs

Bachelor's Degree Thesis Repos

ReadMe Card

Popular repositories Loading

  1. flutter_nfc flutter_nfc Public

    The flutter plugin for support using NFC features on Android and iOS.

    Dart 8

  2. TESA-LORA-WAN TESA-LORA-WAN Public

    Getting Started X-NUCLEO-IKS01A1 on B-L072Z-LRWAN1 applies to regions under frequencies 923 MHz AS923

    C 2 1

  3. basketball-time-counter basketball-time-counter Public

    [PART I] Digital System Design subjects, My project complete course by VHDL Language

    VHDL 1

  4. basketball-score-counter basketball-score-counter Public

    [PART II] Digital System Design subjects, My project complete course by VHDL Language

    VHDL 1

  5. Basketball Basketball Public

    Digital System Design subjects, My project complete course by VHDL Language

    VHDL 1

  6. Run Run Public

    Digital System Design subjects, Project complete course by VHDL Language

    VHDL 1