This repository provides lab material for the 2023 Computer Architecture and Engineering course (02155) at DTU. Although this lab is customized for the DTU course, it can also serve as introduction lab for computer architecture in general and the RISC-V instruction set specifically.

The lab is based on COD: Computer Organization and Design RISC-V Edition: The Hardware Software Interface, 2nd Edition, by David A. Patterson (Author), John L. Hennessy (Author).

To use this material you can: (1) just browse it online on GitHub, (2) clone the repo to have all material offline (using it also for your solutions), or (3) fork the repo (and clone locally), to be able to contribute back with changes.

Contributions: We are happily accepting contributions in the form of pull requests. Even the fix of a small typo is appreciated.

The following list gives an overview of all lab sessions and assignments. For lab sessions where no link is given, we will provide the material in CampusNet.

• week 1: Number representation and performance
• week 2: Lab 2
• week 3: Lab 3
• week 4: paper and pencil
• week 5: assignment
• week 6: Lab 6
• week 7: Lab 7
• following weeks: RISC-V Simulator

For the first labs we will use the web based RISC-V simulator Venus. Venus executes in your browser and there is no need to install any tools on your laptop. You can also save that web page to have a local copy of the simulator to work when offline.

For later labs we will use the RISCV pipeline simulator Ripes. Download it from here. No installation is required, however, enable the file's execute bit to make it executable.

For later lab exercises and your final project we need the full RISC-V toolchain, including a port of gcc. Install the toolchain by following the instructions below.

Install the tools by running the following command in the terminal:

sudo apt-get install -y gcc-riscv64-unknown-elf

The same commands that are used for Ubuntu can be used under Windows by using the Windows Subsystem for Linux (WSL). Activate it and install Ubuntu by following the guide here.

Now follow the instructions for Ubuntu above.

Under macOS you need a packet manager. Homebrew is one of the popular ones. After installing homebrew, install the RISC-V tool brew package from here.

We need a linker file when compiling bare metal programs, particularly for the final project. Create it in the $HOME directory by running the following command:

echo -e 'SECTIONS {\n.text :{*(*)}\n}' > $HOME/linker.ld

Test the installation by opening a terminal and starting the compiler with:

riscv64-unknown-elf-gcc

You should get an error, similar to following

riscv64-unknown-elf-gcc: fatal error: no input files
compilation terminated.

which is good as you know the the compiler is installed. You are now prepared for all RISC-V based lab work and projects.

• The RISC-V Instruction Set Manual
• Venus RV32I simulator
• RISC-V Green Card
• RISC-V Tools (GNU Toolchain, ISA Simulator, Tests)
• Rocket Chip Generator (including the RISC- tools)
• Wildcat RV32I simulator
• SPIM system calls
• Bare metal program on spike

• UC Berkeley: CS61C: Great Ideas in Computer Architecture (Machine Structures)
• MIT: 6.175: Constructive Computer Architecture
• Cornell: ECE 4750: Computer Architecture

• Eclipse plugin
• https://stackoverflow.com/questions/31390127/how-can-i-compile-c-code-to-get-a-bare-metal-skeleton-of-a-minimal-risc-v-assemb
• Assembler appendix from H&P
• MARS docu
• CS61C summer lab 3