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MA_MIPSIV.cpp
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#include <stddef.h>
#include "MA_MIPSIV.h"
#include "MIPS.h"
#include "Jitter.h"
#include "MemoryUtils.h"
#include "COP_SCU.h"
#include "offsetof_def.h"
#include "placeholder_def.h"
// clang-format off
const CMA_MIPSIV::MemoryAccessIdxTraits CMA_MIPSIV::g_byteAccessIdxTraits =
{
reinterpret_cast<void*>(&MemoryUtils_GetByteProxy),
reinterpret_cast<void*>(&MemoryUtils_SetByteProxy),
&CMipsJitter::Load8FromRefIdx,
&CMipsJitter::Store8AtRefIdx,
&CMipsJitter::SignExt8,
1,
true,
};
const CMA_MIPSIV::MemoryAccessIdxTraits CMA_MIPSIV::g_ubyteAccessIdxTraits =
{
reinterpret_cast<void*>(&MemoryUtils_GetByteProxy),
reinterpret_cast<void*>(&MemoryUtils_SetByteProxy),
&CMipsJitter::Load8FromRefIdx,
&CMipsJitter::Store8AtRefIdx,
nullptr,
1,
false,
};
const CMA_MIPSIV::MemoryAccessIdxTraits CMA_MIPSIV::g_halfAccessIdxTraits =
{
reinterpret_cast<void*>(&MemoryUtils_GetHalfProxy),
reinterpret_cast<void*>(&MemoryUtils_SetHalfProxy),
&CMipsJitter::Load16FromRefIdx,
&CMipsJitter::Store16AtRefIdx,
&CMipsJitter::SignExt16,
2,
true,
};
const CMA_MIPSIV::MemoryAccessIdxTraits CMA_MIPSIV::g_uhalfAccessIdxTraits =
{
reinterpret_cast<void*>(&MemoryUtils_GetHalfProxy),
reinterpret_cast<void*>(&MemoryUtils_SetHalfProxy),
&CMipsJitter::Load16FromRefIdx,
&CMipsJitter::Store16AtRefIdx,
nullptr,
2,
false,
};
const CMA_MIPSIV::MemoryAccessIdxTraits CMA_MIPSIV::g_wordAccessIdxTraits =
{
reinterpret_cast<void*>(&MemoryUtils_GetWordProxy),
reinterpret_cast<void*>(&MemoryUtils_SetWordProxy),
&CMipsJitter::LoadFromRefIdx,
&CMipsJitter::StoreAtRefIdx,
nullptr,
4,
true,
};
const CMA_MIPSIV::MemoryAccessIdxTraits CMA_MIPSIV::g_uwordAccessIdxTraits =
{
reinterpret_cast<void*>(&MemoryUtils_GetWordProxy),
reinterpret_cast<void*>(&MemoryUtils_SetWordProxy),
&CMipsJitter::LoadFromRefIdx,
&CMipsJitter::StoreAtRefIdx,
nullptr,
4,
false,
};
static const uint32 g_LWMaskRight[4] =
{
0x00FFFFFF,
0x0000FFFF,
0x000000FF,
0x00000000,
};
static const uint32 g_LWMaskLeft[4] =
{
0xFFFFFF00,
0xFFFF0000,
0xFF000000,
0x00000000,
};
static const uint64 g_LDMaskRight[8] =
{
0x00FFFFFFFFFFFFFFULL,
0x0000FFFFFFFFFFFFULL,
0x000000FFFFFFFFFFULL,
0x00000000FFFFFFFFULL,
0x0000000000FFFFFFULL,
0x000000000000FFFFULL,
0x00000000000000FFULL,
0x0000000000000000ULL,
};
static const uint64 g_LDMaskLeft[8] =
{
0xFFFFFFFFFFFFFF00ULL,
0xFFFFFFFFFFFF0000ULL,
0xFFFFFFFFFF000000ULL,
0xFFFFFFFF00000000ULL,
0xFFFFFF0000000000ULL,
0xFFFF000000000000ULL,
0xFF00000000000000ULL,
0x0000000000000000ULL,
};
// clang-format on
extern "C" uint32 LWL_Proxy(uint32 address, uint32 rt, CMIPS* context)
{
uint32 alignedAddress = address & ~0x03;
uint32 byteOffset = address & 0x03;
uint32 accessType = 3 - byteOffset;
uint32 memory = MemoryUtils_GetWordProxy(context, alignedAddress);
memory <<= accessType * 8;
rt &= g_LWMaskRight[byteOffset];
rt |= memory;
return rt;
}
extern "C" uint32 LWR_Proxy(uint32 address, uint32 rt, CMIPS* context)
{
uint32 alignedAddress = address & ~0x03;
uint32 byteOffset = address & 0x03;
uint32 accessType = 3 - byteOffset;
uint32 memory = MemoryUtils_GetWordProxy(context, alignedAddress);
memory >>= byteOffset * 8;
rt &= g_LWMaskLeft[accessType];
rt |= memory;
return rt;
}
extern "C" uint64 LDL_Proxy(uint32 address, uint64 rt, CMIPS* context)
{
uint32 alignedAddress = address & ~0x07;
uint32 byteOffset = address & 0x07;
uint32 accessType = 7 - byteOffset;
uint64 memory = MemoryUtils_GetDoubleProxy(context, alignedAddress);
memory <<= accessType * 8;
rt &= g_LDMaskRight[byteOffset];
rt |= memory;
return rt;
}
extern "C" uint64 LDR_Proxy(uint32 address, uint64 rt, CMIPS* context)
{
uint32 alignedAddress = address & ~0x07;
uint32 byteOffset = address & 0x07;
uint32 accessType = 7 - byteOffset;
uint64 memory = MemoryUtils_GetDoubleProxy(context, alignedAddress);
memory >>= byteOffset * 8;
rt &= g_LDMaskLeft[accessType];
rt |= memory;
return rt;
}
extern "C" void SWL_Proxy(uint32 address, uint32 rt, CMIPS* context)
{
uint32 alignedAddress = address & ~0x03;
uint32 byteOffset = address & 0x03;
uint32 accessType = 3 - byteOffset;
rt >>= accessType * 8;
uint32 memory = MemoryUtils_GetWordProxy(context, alignedAddress);
memory &= g_LWMaskLeft[byteOffset];
memory |= rt;
MemoryUtils_SetWordProxy(context, memory, alignedAddress);
}
extern "C" void SWR_Proxy(uint32 address, uint32 rt, CMIPS* context)
{
uint32 alignedAddress = address & ~0x03;
uint32 byteOffset = address & 0x03;
uint32 accessType = 3 - byteOffset;
rt <<= byteOffset * 8;
uint32 memory = MemoryUtils_GetWordProxy(context, alignedAddress);
memory &= g_LWMaskRight[accessType];
memory |= rt;
MemoryUtils_SetWordProxy(context, memory, alignedAddress);
}
extern "C" void SDL_Proxy(uint32 address, uint64 rt, CMIPS* context)
{
uint32 alignedAddress = address & ~0x07;
uint32 byteOffset = address & 0x07;
uint32 accessType = 7 - byteOffset;
rt >>= accessType * 8;
uint64 memory = MemoryUtils_GetDoubleProxy(context, alignedAddress);
memory &= g_LDMaskLeft[byteOffset];
memory |= rt;
MemoryUtils_SetDoubleProxy(context, memory, alignedAddress);
}
extern "C" void SDR_Proxy(uint32 address, uint64 rt, CMIPS* context)
{
uint32 alignedAddress = address & ~0x07;
uint32 byteOffset = address & 0x07;
uint32 accessType = 7 - byteOffset;
rt <<= byteOffset * 8;
uint64 memory = MemoryUtils_GetDoubleProxy(context, alignedAddress);
memory &= g_LDMaskRight[accessType];
memory |= rt;
MemoryUtils_SetDoubleProxy(context, memory, alignedAddress);
}
CMA_MIPSIV::CMA_MIPSIV(MIPS_REGSIZE nRegSize)
: CMIPSArchitecture(nRegSize)
{
SetupInstructionTables();
SetupReflectionTables();
}
void CMA_MIPSIV::SetupInstructionTables()
{
for(unsigned int i = 0; i < MAX_GENERAL_OPS; i )
{
m_pOpGeneral[i] = std::bind(m_cOpGeneral[i], this);
}
for(unsigned int i = 0; i < MAX_SPECIAL_OPS; i )
{
m_pOpSpecial[i] = std::bind(m_cOpSpecial[i], this);
}
for(unsigned int i = 0; i < MAX_SPECIAL2_OPS; i )
{
m_pOpSpecial2[i] = std::bind(&CMA_MIPSIV::Illegal, this);
}
for(unsigned int i = 0; i < MAX_REGIMM_OPS; i )
{
m_pOpRegImm[i] = std::bind(m_cOpRegImm[i], this);
}
}
bool CMA_MIPSIV::Ensure64BitRegs()
{
if(m_regSize != MIPS_REGSIZE_64)
{
Illegal();
return false;
}
return true;
}
void CMA_MIPSIV::CompileInstruction(uint32 address, CMipsJitter* codeGen, CMIPS* ctx, uint32 instrPosition)
{
SetupQuickVariables(address, codeGen, ctx, instrPosition);
m_nRS = (uint8)((m_nOpcode >> 21) & 0x1F);
m_nRT = (uint8)((m_nOpcode >> 16) & 0x1F);
m_nRD = (uint8)((m_nOpcode >> 11) & 0x1F);
m_nSA = (uint8)((m_nOpcode >> 6) & 0x1F);
m_nImmediate = (uint16)(m_nOpcode & 0xFFFF);
if(m_nOpcode)
{
m_pOpGeneral[(m_nOpcode >> 26)]();
}
}
void CMA_MIPSIV::SPECIAL()
{
m_pOpSpecial[m_nImmediate & 0x3F]();
}
void CMA_MIPSIV::SPECIAL2()
{
m_pOpSpecial2[m_nImmediate & 0x3F]();
}
void CMA_MIPSIV::REGIMM()
{
m_pOpRegImm[m_nRT]();
}
//////////////////////////////////////////////////
//General Opcodes
//////////////////////////////////////////////////
//02
void CMA_MIPSIV::J()
{
m_codeGen->PushRel(offsetof(CMIPS, m_State.nPC));
m_codeGen->PushCst(m_instrPosition);
m_codeGen->Add();
m_codeGen->PushCst(0xF0000000);
m_codeGen->And();
m_codeGen->PushCst((m_nOpcode & 0x03FFFFFF) << 2);
m_codeGen->Or();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nDelayedJumpAddr));
}
//03
void CMA_MIPSIV::JAL()
{
//64-bit addresses?
//Save the address in RA
m_codeGen->PushRel(offsetof(CMIPS, m_State.nPC));
m_codeGen->PushCst(m_instrPosition 8);
m_codeGen->Add();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[31].nV[0]));
//Update jump address
m_codeGen->PushRel(offsetof(CMIPS, m_State.nPC));
m_codeGen->PushCst(m_instrPosition);
m_codeGen->Add();
m_codeGen->PushCst(0xF0000000);
m_codeGen->And();
m_codeGen->PushCst((m_nOpcode & 0x03FFFFFF) << 2);
m_codeGen->Or();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nDelayedJumpAddr));
}
//04
void CMA_MIPSIV::BEQ()
{
Template_BranchEq(true, false);
}
//05
void CMA_MIPSIV::BNE()
{
Template_BranchEq(false, false);
}
//06
void CMA_MIPSIV::BLEZ()
{
//Less/Equal & Not Likely
Template_BranchLez(true, false);
}
//07
void CMA_MIPSIV::BGTZ()
{
//Not Less/Equal & Not Likely
Template_BranchLez(false, false);
}
//08
void CMA_MIPSIV::ADDI()
{
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PushCst(static_cast<int16>(m_nImmediate));
m_codeGen->Add();
if(m_regSize == MIPS_REGSIZE_64)
{
m_codeGen->PushTop();
m_codeGen->SignExt();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1]));
}
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
}
//09
void CMA_MIPSIV::ADDIU()
{
if(m_nRT == 0 && m_nRS == 0)
{
//Hack: PS2 IOP uses ADDIU R0, R0, $x for dynamic linking
m_codeGen->PushRel(offsetof(CMIPS, m_State.nPC));
m_codeGen->PushCst(m_instrPosition);
m_codeGen->Add();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nCOP0[CCOP_SCU::EPC]));
m_codeGen->PushCst(MIPS_EXCEPTION_SYSCALL);
m_codeGen->PullRel(offsetof(CMIPS, m_State.nHasException));
}
else
{
if(m_nRT == 0) return;
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PushCst(static_cast<int16>(m_nImmediate));
m_codeGen->Add();
if(m_regSize == MIPS_REGSIZE_64)
{
m_codeGen->PushTop();
m_codeGen->SignExt();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1]));
}
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
}
}
//0A
void CMA_MIPSIV::SLTI()
{
Template_SetLessThanImm(true);
}
//0B
void CMA_MIPSIV::SLTIU()
{
Template_SetLessThanImm(false);
}
//0C
void CMA_MIPSIV::ANDI()
{
if(m_nRT == 0) return;
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PushCst(m_nImmediate);
m_codeGen->And();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
if(m_regSize == MIPS_REGSIZE_64)
{
m_codeGen->PushCst(0);
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1]));
}
}
//0D
void CMA_MIPSIV::ORI()
{
if(m_nRT == 0) return;
//Lower 32-bits
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PushCst(m_nImmediate);
m_codeGen->Or();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
//Higher 32-bits (only if registers are different)
if((m_regSize == MIPS_REGSIZE_64) && (m_nRS != m_nRT))
{
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[1]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1]));
}
}
//0E
void CMA_MIPSIV::XORI()
{
if(m_nRT == 0) return;
//Lower 32-bits
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PushCst(m_nImmediate);
m_codeGen->Xor();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
//Higher 32-bits
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[1]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1]));
}
//0F
void CMA_MIPSIV::LUI()
{
if(m_nRT == 0) return;
m_codeGen->PushCst(m_nImmediate << 16);
if(m_regSize == MIPS_REGSIZE_64)
{
m_codeGen->PushCst((m_nImmediate & 0x8000) ? 0xFFFFFFFF : 0x00000000);
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1]));
}
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
}
//10
void CMA_MIPSIV::COP0()
{
if(m_pCtx->m_pCOP[0] != NULL)
{
m_pCtx->m_pCOP[0]->CompileInstruction(m_nAddress, m_codeGen, m_pCtx, m_instrPosition);
}
else
{
Illegal();
}
}
//11
void CMA_MIPSIV::COP1()
{
if(m_pCtx->m_pCOP[1] != NULL)
{
m_pCtx->m_pCOP[1]->CompileInstruction(m_nAddress, m_codeGen, m_pCtx, m_instrPosition);
}
else
{
Illegal();
}
}
//12
void CMA_MIPSIV::COP2()
{
if(m_pCtx->m_pCOP[2] != NULL)
{
m_pCtx->m_pCOP[2]->CompileInstruction(m_nAddress, m_codeGen, m_pCtx, m_instrPosition);
}
else
{
Illegal();
}
}
//14
void CMA_MIPSIV::BEQL()
{
Template_BranchEq(true, true);
}
//15
void CMA_MIPSIV::BNEL()
{
Template_BranchEq(false, true);
}
//16
void CMA_MIPSIV::BLEZL()
{
//Less/Equal & Likely
Template_BranchLez(true, true);
}
//17
void CMA_MIPSIV::BGTZL()
{
//Not Less/Equal & Likely
Template_BranchLez(false, true);
}
//18
void CMA_MIPSIV::DADDI()
{
//TODO: Check for overflow
DADDIU();
}
//19
void CMA_MIPSIV::DADDIU()
{
if(!Ensure64BitRegs()) return;
if(m_nRT == 0) return;
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PushCst64(static_cast<int16>(m_nImmediate));
m_codeGen->Add64();
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
}
//1A
void CMA_MIPSIV::LDL()
{
if(!Ensure64BitRegs()) return;
if(m_nRT == 0) return;
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
m_codeGen->PushCtx();
m_codeGen->Call(reinterpret_cast<void*>(&LDL_Proxy), 3, Jitter::CJitter::RETURN_VALUE_64);
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
}
//1B
void CMA_MIPSIV::LDR()
{
if(!Ensure64BitRegs()) return;
if(m_nRT == 0) return;
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
m_codeGen->PushCtx();
m_codeGen->Call(reinterpret_cast<void*>(&LDR_Proxy), 3, Jitter::CJitter::RETURN_VALUE_64);
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
}
//20
void CMA_MIPSIV::LB()
{
Template_Load32Idx(g_byteAccessIdxTraits);
}
//21
void CMA_MIPSIV::LH()
{
Template_Load32Idx(g_halfAccessIdxTraits);
}
//22
void CMA_MIPSIV::LWL()
{
CheckTLBExceptions(false);
if(m_nRT == 0) return;
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->PushCtx();
m_codeGen->Call(reinterpret_cast<void*>(&LWL_Proxy), 3, Jitter::CJitter::RETURN_VALUE_32);
if(m_regSize == MIPS_REGSIZE_64)
{
m_codeGen->PushTop();
m_codeGen->SignExt();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1]));
}
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
}
//23
void CMA_MIPSIV::LW()
{
Template_Load32Idx(g_wordAccessIdxTraits);
}
//24
void CMA_MIPSIV::LBU()
{
Template_Load32Idx(g_ubyteAccessIdxTraits);
}
//25
void CMA_MIPSIV::LHU()
{
Template_Load32Idx(g_uhalfAccessIdxTraits);
}
//26
void CMA_MIPSIV::LWR()
{
CheckTLBExceptions(false);
if(m_nRT == 0) return;
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->PushCtx();
m_codeGen->Call(reinterpret_cast<void*>(&LWR_Proxy), 3, Jitter::CJitter::RETURN_VALUE_32);
if(m_regSize == MIPS_REGSIZE_64)
{
m_codeGen->PushTop();
m_codeGen->SignExt();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[1]));
}
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
}
//27
void CMA_MIPSIV::LWU()
{
Template_Load32Idx(g_uwordAccessIdxTraits);
}
//28
void CMA_MIPSIV::SB()
{
Template_Store32Idx(g_byteAccessIdxTraits);
}
//29
void CMA_MIPSIV::SH()
{
Template_Store32Idx(g_halfAccessIdxTraits);
}
//2A
void CMA_MIPSIV::SWL()
{
CheckTLBExceptions(true);
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->PushCtx();
m_codeGen->Call(reinterpret_cast<void*>(&SWL_Proxy), 3, Jitter::CJitter::RETURN_VALUE_NONE);
}
//2B
void CMA_MIPSIV::SW()
{
Template_Store32Idx(g_wordAccessIdxTraits);
}
//2C
void CMA_MIPSIV::SDL()
{
if(!Ensure64BitRegs()) return;
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
m_codeGen->PushCtx();
m_codeGen->Call(reinterpret_cast<void*>(&SDL_Proxy), 3, Jitter::CJitter::RETURN_VALUE_NONE);
}
//2D
void CMA_MIPSIV::SDR()
{
if(!Ensure64BitRegs()) return;
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
m_codeGen->PushCtx();
m_codeGen->Call(reinterpret_cast<void*>(&SDR_Proxy), 3, Jitter::CJitter::RETURN_VALUE_NONE);
}
//2E
void CMA_MIPSIV::SWR()
{
CheckTLBExceptions(true);
ComputeMemAccessAddrNoXlat();
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRT].nV[0]));
m_codeGen->PushCtx();
m_codeGen->Call(reinterpret_cast<void*>(&SWR_Proxy), 3, Jitter::CJitter::RETURN_VALUE_NONE);
}
//2F
void CMA_MIPSIV::CACHE()
{
//No cache in our system. Nothing to do.
}
//31
void CMA_MIPSIV::LWC1()
{
if(m_pCtx->m_pCOP[1] != NULL)
{
m_pCtx->m_pCOP[1]->CompileInstruction(m_nAddress, m_codeGen, m_pCtx, m_instrPosition);
}
else
{
Illegal();
}
}
//33
void CMA_MIPSIV::PREF()
{
//Nothing to do
}
//36
void CMA_MIPSIV::LDC2()
{
if(m_pCtx->m_pCOP[2] != NULL)
{
m_pCtx->m_pCOP[2]->CompileInstruction(m_nAddress, m_codeGen, m_pCtx, m_instrPosition);
}
else
{
Illegal();
}
}
//37
void CMA_MIPSIV::LD()
{
if(!Ensure64BitRegs()) return;
if(m_nRT == 0) return;
ComputeMemAccessPageRef();
m_codeGen->PushCst(0);
m_codeGen->BeginIf(Jitter::CONDITION_NE);
{
ComputeMemAccessRefIdx(8);
m_codeGen->Load64FromRefIdx(1);
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
}
m_codeGen->Else();
{
ComputeMemAccessAddrNoXlat();
m_codeGen->PushCtx();
m_codeGen->PushIdx(1);
m_codeGen->Call(reinterpret_cast<void*>(&MemoryUtils_GetDoubleProxy), 2, Jitter::CJitter::RETURN_VALUE_64);
m_codeGen->PullRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
m_codeGen->PullTop();
}
m_codeGen->EndIf();
}
//39
void CMA_MIPSIV::SWC1()
{
if(m_pCtx->m_pCOP[1] != NULL)
{
m_pCtx->m_pCOP[1]->CompileInstruction(m_nAddress, m_codeGen, m_pCtx, m_instrPosition);
}
else
{
Illegal();
}
}
//3E
void CMA_MIPSIV::SDC2()
{
if(m_pCtx->m_pCOP[2] != NULL)
{
m_pCtx->m_pCOP[2]->CompileInstruction(m_nAddress, m_codeGen, m_pCtx, m_instrPosition);
}
else
{
Illegal();
}
}
//3F
void CMA_MIPSIV::SD()
{
if(!Ensure64BitRegs()) return;
ComputeMemAccessPageRef();
m_codeGen->PushCst(0);
m_codeGen->BeginIf(Jitter::CONDITION_NE);
{
ComputeMemAccessRefIdx(8);
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
m_codeGen->Store64AtRefIdx(1);
}
m_codeGen->Else();
{
ComputeMemAccessAddrNoXlat();
m_codeGen->PushCtx();
m_codeGen->PushRel64(offsetof(CMIPS, m_State.nGPR[m_nRT]));
m_codeGen->PushIdx(2);
m_codeGen->Call(reinterpret_cast<void*>(&MemoryUtils_SetDoubleProxy), 3, Jitter::CJitter::RETURN_VALUE_NONE);
m_codeGen->PullTop();
}
m_codeGen->EndIf();
}
//////////////////////////////////////////////////
//Special Opcodes
//////////////////////////////////////////////////
//00
void CMA_MIPSIV::SLL()
{
void (Jitter::CJitter::*shiftFunction)(uint8) = &Jitter::CJitter::Shl;
Template_ShiftCst32(std::bind(shiftFunction, m_codeGen, std::placeholders::_1));
}
//02
void CMA_MIPSIV::SRL()
{
void (Jitter::CJitter::*shiftFunction)(uint8) = &Jitter::CJitter::Srl;
Template_ShiftCst32(std::bind(shiftFunction, m_codeGen, std::placeholders::_1));
}
//03
void CMA_MIPSIV::SRA()
{
void (Jitter::CJitter::*shiftFunction)(uint8) = &Jitter::CJitter::Sra;
Template_ShiftCst32(std::bind(shiftFunction, m_codeGen, std::placeholders::_1));
}
//04
void CMA_MIPSIV::SLLV()
{
void (Jitter::CJitter::*shiftFunction)() = &Jitter::CJitter::Shl;
Template_ShiftVar32(std::bind(shiftFunction, m_codeGen));
}
//06
void CMA_MIPSIV::SRLV()
{
void (Jitter::CJitter::*shiftFunction)() = &Jitter::CJitter::Srl;
Template_ShiftVar32(std::bind(shiftFunction, m_codeGen));
}
//07
void CMA_MIPSIV::SRAV()
{
void (Jitter::CJitter::*shiftFunction)() = &Jitter::CJitter::Sra;
Template_ShiftVar32(std::bind(shiftFunction, m_codeGen));
}
//08
void CMA_MIPSIV::JR()
{
//TODO: 64-bits addresses
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nDelayedJumpAddr));
}
//09
void CMA_MIPSIV::JALR()
{
//TODO: 64-bits addresses
//Set the jump address
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nDelayedJumpAddr));
if(m_nRD != 0)
{
//Save address in register
m_codeGen->PushRel(offsetof(CMIPS, m_State.nPC));
m_codeGen->PushCst(m_instrPosition 8);
m_codeGen->Add();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[0]));
}
}
//0A
void CMA_MIPSIV::MOVZ()
{
Template_MovEqual(true);
}
//0B
void CMA_MIPSIV::MOVN()
{
Template_MovEqual(false);
}
//0C
void CMA_MIPSIV::SYSCALL()
{
//Save current EPC
m_codeGen->PushRel(offsetof(CMIPS, m_State.nPC));
m_codeGen->PushCst(m_instrPosition);
m_codeGen->Add();
m_codeGen->PullRel(offsetof(CMIPS, m_State.nCOP0[CCOP_SCU::EPC]));
m_codeGen->PushCst(MIPS_EXCEPTION_SYSCALL);
m_codeGen->PullRel(offsetof(CMIPS, m_State.nHasException));
}
//0D
void CMA_MIPSIV::BREAK()
{
//NOP
}
//0F
void CMA_MIPSIV::SYNC()
{
//NOP
}
//10
void CMA_MIPSIV::MFHI()
{
if(m_nRD == 0) return;
m_codeGen->PushRel(offsetof(CMIPS, m_State.nHI[0]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[0]));
m_codeGen->PushRel(offsetof(CMIPS, m_State.nHI[1]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[1]));
}
//11
void CMA_MIPSIV::MTHI()
{
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nHI[0]));
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[1]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nHI[1]));
}
//12
void CMA_MIPSIV::MFLO()
{
if(m_nRD == 0) return;
m_codeGen->PushRel(offsetof(CMIPS, m_State.nLO[0]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[0]));
m_codeGen->PushRel(offsetof(CMIPS, m_State.nLO[1]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nGPR[m_nRD].nV[1]));
}
//13
void CMA_MIPSIV::MTLO()
{
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[0]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nLO[0]));
m_codeGen->PushRel(offsetof(CMIPS, m_State.nGPR[m_nRS].nV[1]));
m_codeGen->PullRel(offsetof(CMIPS, m_State.nLO[1]));
}