ATE Test Engineer

Title: ATE Test Engineer

Duration: Fulltime

Location: Santa Clara, CA

Description:

• Debug and optimize test patterns for semiconductor devices.
• Ensure accurate timing and signal integrity in test patterns.
• Collaborate with the ATE (Automatic Test Equipment) team to execute test patterns effectively.
• Utilize V93k and SmarTest 8 platforms for testing.
• Participate in New Product Introduction (NPI) activities related to memory Built-In Self-Test (mbist), scan, and high-speed testing.
• Demonstrate strong debugging skills.
• Communicate effectively with cross-functional teams.
• Experience with Advantest V93 SMT8 programming.
• Familiarity with Automated Test Equipment (ATE) setups for semiconductor testing, Understanding of semiconductor test engineering principles and methodologies.
• Basic Understanding of Test socket inspection, Load board (Interface between Chip and tester), Socket, Plungers, Winway ATC(Automated thermal controller) and Bed of nails for testing at Tester
• Ability to understand and modify test scripts.
• Proficiency in semiconductor testing at both Wafer and Package levels.